Skip to content

deleted double duplicate inst_ecall.zir #216

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: main
Choose a base branch
from
Open

deleted double duplicate inst_ecall.zir #216

Changes from all commits
Commits
Show all changes
1 commit
Select commit
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 2 additions & 2 deletions zirgen/circuit/rv32im/v2/dsl/inst_ecall.zir
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -76,7 +76,7 @@ component ECallHostReadSetup(cycle: Reg, input: InstInput) {
len.high = 0;
// Get the 'returned' length
newLen := NondetU16Reg(HostReadPrepare(fd.low, len.low));
// Verify it's less than or equal to the the input length
// Verify it's less than or equal to the input length
diff := U16Reg(len.low - newLen);
// Write back to A0
MemoryWrite(cycle, MachineRegBase() + RegA0(), ValU32(newLen, 0));
Expand Down Expand Up @@ -109,7 +109,7 @@ component ECallHostWrite(cycle: Reg, input: InstInput) {
len.high = 0;
// Do write extern and get return length
newLen := NondetU16Reg(HostWrite(fd.low, ptr, len.low));
// Verify it's less than or equal to the the input length
// Verify it's less than or equal to the input length
diff := U16Reg(len.low - newLen);
// Write back to A0
MemoryWrite(cycle, MachineRegBase() + RegA0(), ValU32(newLen, 0));
Expand Down