RAMwich

RAMwich is a simulator for heterogeneous RRAM and SRAM CiM architectures.

How to run

export PYTHONPATH="$PWD/src:$PYTHONPATH"
python run.py --config <config_file> --ops <ops_file> --weight <weight_file> --activation <activation_file>

Test

To test loading operations and weights:

export PYTHONPATH="$PWD/src:$PYTHONPATH"
python tests/test_load.py

To test MVMU:

export PYTHONPATH="$PWD/src:$PYTHONPATH"
python tests/test_mvm.py

To test DRAM controller:

export PYTHONPATH="$PWD/src:$PYTHONPATH"
python -m pytest tests/test_dram_controller.py

To test all core features:

export PYTHONPATH="$PWD/src:$PYTHONPATH"
python tests/test_core_features.py

To test all core and tile features:

export PYTHONPATH="$PWD/src:$PYTHONPATH"
python tests/test_tile_features.py

To test a single MLP run on MNIST:

export PYTHONPATH="$PWD/src:$PYTHONPATH"
python tests/test_mlp_on_mnist_single.py

To test multiple batch of MNIST on MLP, adjust num_workers in test_mlp_on_mnist_multi.py, then run:

export PYTHONPATH="$PWD/src:$PYTHONPATH"
python tests/test_mlp_on_mnist_multi.py

TODO

ETA: 2 days

• convert puma simulator config file to .yaml file that can be read by RAMwich
• convert puma compiler output .puma to .json files that conform to ops.py definitions/load_operations
• test the RAMwich simulator, verify that it can load operations and build architecture

ETA: 2 days

• convert puma config .yaml files that can be read by RAMwich/dac_config adc_config
• convert puma compiler output .weight to .json files that conform to load_weights
• modify stats class according to puma simulator

ETA: 1 week (1 day for each unit)

• move the puma simulator functional simultion logic to RAMwich (add details in mvmu/adc/alu, need to decompose this task into smaller tasks later) Here is a more detailed plan:
  • implement all core visitor methods
    • implement and test MVMU components(xbar, adc, dac, sna etc.)
    • implement mvm method in MVMU for visitor
    • implement and test core components for calculation(cache, alu)
    • implement visitor method for set, copy, mvm and vfu
    • implement and test core and tile components for load and store(dram, dram controller etc.)
    • implement visitor method for load and store
  • implement all tile visitor methods (send and receive)
  • test the run time, make sure it is faster than original simulator.
  • run timing simulation, check with puma that cycles match
  • run functional simulation, verify that accuracy match
• test the RAMwich simulator with mlp, verify that cycles, energy, and area are aligned with puma

ETA: 2 days

• test the RAMwich simulator with mlp, verify that accuracy is aligned
• Add multi-batch function

ETA

• Add SRAM CIM support for inference (2 to 3 days)
• Verify all parameters of blocks
• Run test on LeNet-5, ResNet-20, parallel-CNN, DS-CNN

misc

• save/load weight in npy
• recalculate MVM latency
• redesign receive logic
• Do rusults visualize