pinctrl: bflb: fix the numeric function values #5
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Add bindings doc for Bouffalolab UART Driver Signed-off-by: Jisheng Zhang <[email protected]>
The Bouffalolab bl808 SoC contains three riscv CPUs, namely M0, D0 and LP. The D0 is 64bit RISC-V GC compatible, so can run linux. Signed-off-by: Jisheng Zhang <[email protected]>
Add a baisc dtsi for the bouffalolab bl808 SoC. Signed-off-by: Jisheng Zhang <[email protected]>
Sipeed manufactures a M1S system-on-module and dock board, add basic support for them. Signed-off-by: Jisheng Zhang <[email protected]>
I want to maintain this Bouffalolab riscv SoC entry from now on. Signed-off-by: Jisheng Zhang <[email protected]>
ehci controller registers are at address 0x20072000 not 0x20072010
Pinmux for this device conflicts with EMAC, so disable it until pinmux is changed to some other pins.
Add device-tree node for EMAC ethernet device and fake clock node to represent 50MHz clock to the device. Add a virtualized interrupt bit for forwareded EMAC interrupts.
The number of address cells needed here (one) does not match the implicitly-defined default number of cells. Signed-off-by: Samuel Holland <[email protected]>
The number of address cells needed here (one) does not match the implicitly-defined default number of cells. Signed-off-by: Allen Martin <[email protected]>
…string on the Ox64 device tree
The function values to be written to the register are not consecutive (like there are no functions for values 12-15). The pinctrl subsystem assigns the indexes (selectors) for each function as they are added so the selector for pwm0 was 12, not 16. Since bflb_gpio_pinmux_set was using those selectors as a register value, all of the functions 12+ were not set correctly. For example for i2c2, the value of 15 was written to the register instead of 19. This patch fixes this problem by introducing a new struct that contains the name and the correct function value for each pin. Signed-off-by: Krzysztof Adamski <[email protected]>
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LGTM, testing required, #6 seems preferrable as then we'll remain equal to U-Boot's list, but that is just my personal opinion. Group discussion required. |
This was referenced Apr 23, 2023
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The function values to be written to the register are not consecutive (like there are no functions for values 12-15). The pinctrl subsystem assigns the indexes (selectors) for each function as they are added so the selector for pwm0 was 12, not 16.
Since bflb_gpio_pinmux_set was using those selectors as a register value, all of the functions 12+ were not set correctly. For example for i2c2, the value of 15 was written to the register instead of 19.
This patch fixes this problem by introducing a new struct that contains the name and the correct function value for each pin.