IPC Mailbox, RemoteProc, RPMsg and rpmsg-net support

Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml

@@ -0,0 +1,50 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Jisheng Zhang <[email protected]>
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/serial/bouffalolab,uart.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Bouffalolab UART Controller
+
+maintainers:
+  - Jisheng Zhang <[email protected]>
+
+allOf:
+  - $ref: serial.yaml#
+
+properties:
+  compatible:
+    const: bouffalolab,uart
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/irq.h>
+    aliases {
+        serial0 = &uart0;
+    };
+
+    uart0: serial@30002000 {
+        compatible = "bouffalolab,uart";
+        reg = <0x30002000 0x1000>;
+        interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&xtal>;
+    };
+...

MAINTAINERS

@@ -3788,6 +3788,12 @@ S:	Maintained
 F:	Documentation/devicetree/bindings/iio/accel/bosch,bma400.yaml
 F:	drivers/iio/accel/bma400*
 
+BOUFFALOLAB UART DRIVER
+M:	Jisheng Zhang <[email protected]>
+S:	Maintained
+F:	Documentation/devicetree/bindings/serial/bouffalolab,uart.yaml
+F:	drivers/tty/serial/bflb_uart.c
+
 BPF [GENERAL] (Safe Dynamic Programs and Tools)
 M:	Alexei Starovoitov <[email protected]>
 M:	Daniel Borkmann <[email protected]>
@@ -17975,6 +17981,12 @@ F:	arch/riscv/
 N:	riscv
 K:	riscv
 
+RISC-V BOUFFALOLAB SOC SUPPORT
+M:	Jisheng Zhang <[email protected]>
+L:	linux-riscv at lists.infradead.org
+S:	Maintained
+F:	arch/riscv/boot/dts/bouffalolab/
+
 RISC-V MICROCHIP FPGA SUPPORT
 M:	Conor Dooley <[email protected]>
 M:	Daire McNamara <[email protected]>

arch/riscv/Kconfig.socs

@@ -1,5 +1,11 @@
 menu "SoC selection"
 
+config SOC_BOUFFALOLAB
+	bool "Bouffalolab SoCs"
+	select SIFIVE_PLIC
+	help
+	  This enables support for Bouffalolab SoC platforms.
+
 config SOC_MICROCHIP_POLARFIRE
 	bool "Microchip PolarFire SoCs"
 	select MCHP_CLK_MPFS

arch/riscv/boot/dts/Makefile

@@ -1,4 +1,5 @@
 # SPDX-License-Identifier: GPL-2.0
+subdir-y += bouffalolab
 subdir-y += sifive
 subdir-y += starfive
 subdir-$(CONFIG_SOC_CANAAN_K210_DTB_BUILTIN) += canaan

arch/riscv/boot/dts/bouffalolab/Makefile

@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_SOC_BOUFFALOLAB) += bl808-sipeed-m1s.dtb
+dtb-$(CONFIG_SOC_BOUFFALOLAB) += bl808-pine64-ox64.dtb

arch/riscv/boot/dts/bouffalolab/bl808-pine64-ox64.dts

@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2022 Jisheng Zhang <[email protected]>
+ */
+
+/dts-v1/;
+
+#include "bl808.dtsi"
+
+/ {
+	model = "Pine64 Ox64";
+	compatible = "pine64,ox64", "bflb,bl808";
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+	};
+
+	chosen {
+		stdout-path = "serial0:2000000n8";
+		bootargs = "console=ttyS0,2000000 loglevel=8 earlycon=sbi root=/dev/mmcblk0p2 rootwait rootfstype=ext4";
+		linux,initrd-start = <0x0 0x52000000>;
+		linux,initrd-end = <0x0 0x52941784>;
+	};
+
+	memory@50000000 {
+		device_type = "memory";
+		reg = <0x50000000 0x04000000>;
+	};
+
+	xip_flash@58500000 {
+		compatible = "mtd-rom";
+		reg = <0x58500000 0x400000>;
+		linux,mtd-name = "xip-flash.0";
+		erase-size = <0x10000>;
+		bank-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+	};
+};
+
+&pinctrl {
+	status = "okay";
+};
+
+&seceng {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&sdhci0 {
+	status = "okay";
+};
+
+&ipclic {
+	status = "okay";
+};
+
+&ehci0 {
+	status = "disabled";
+};
+
+&enet0 {
+	status = "okay";
+};
+
+&rproc {
+	status = "okay";
+};

arch/riscv/boot/dts/bouffalolab/bl808-sipeed-m1s.dts

@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ or MIT)
+/*
+ * Copyright (C) 2022 Jisheng Zhang <[email protected]>
+ */
+
+/dts-v1/;
+
+#include "bl808.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
+
+/ {
+	model = "Sipeed M1s";
+	compatible = "sipeed,m1s", "bflb,bl808";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:2000000n8";
+		bootargs = "console=ttyS0,2000000 loglevel=8 earlycon=sbi root=/dev/mmcblk0p2 rootwait rootfstype=ext4";
+		linux,initrd-start = <0x0 0x52000000>;
+		linux,initrd-end = <0x0 0x52941784>;
+	};
+
+	memory@50000000 {
+		device_type = "memory";
+		reg = <0x50000000 0x04000000>;
+	};
+
+	xip_flash@58500000 {
+		compatible = "mtd-rom";
+		reg = <0x58500000 0x400000>;
+		linux,mtd-name = "xip-flash.0";
+		erase-size = <0x10000>;
+		bank-width = <4>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		rootfs@0 {
+			label = "rootfs";
+			reg = <0x00000 0x280000>;
+			read-only;
+		};
+	};
+
+	leds {
+        compatible = "gpio-leds";
+        led {
+            gpios = <&pinctrl 8 GPIO_ACTIVE_LOW>;
+        };
+    };
+};
+
+&pinctrl {
+	status = "okay";
+
+	led {
+		pins = "GPIO8";
+		function = "gpio";
+	};
+};
+
+&seceng {
+	status = "okay";
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&sdhci0 {
+	status = "okay";
+};
+
+&ipclic {
+	status = "okay";
+};
+
+&ehci0 {
+	status = "okay";
+};
+
+&enet0 {
+	status = "okay";
+};
+
+&rproc {
+	status = "okay";
+};