arm64 JIT: Fix broken cache invalidation

[wheremyfoodat]

Fully flushes JIT cache when FlushCache is called. Should fix several games. Tested with Castlevania: Symphony of the Night, which fails to read from memcards without this patch.

Unlike the x64 equivalent, this doesn't use optimized SIMD code for invalidation yet, but it should be fine for now since most ARM users are probably on Apple Silicon which is plenty fast.

[coderabbitai]

Walkthrough

Adds a new public final override method invalidateCache() to DynaRecCPU that zero-fills I-cache state (sets iCacheAddr and iCacheCode to 0xff) and calls uncompileAll() to mark all JIT-compiled blocks as uncompiled.

Changes

Cohort / File(s)	Summary
AArch64 JIT cache invalidation src/core/DynaRec_aa64/recompiler.h	Introduced DynaRecCPU::invalidateCache() (override final) that resets I-cache arrays to 0xff and invokes uncompileAll() to invalidate compiled blocks.

Sequence Diagram(s)

sequenceDiagram
  participant Caller
  participant DynaRecCPU
  participant ICache
  participant JITBlocks

  Caller->>DynaRecCPU: invalidateCache()
  DynaRecCPU->>ICache: fill iCacheAddr/iCacheCode with 0xff
  DynaRecCPU->>JITBlocks: uncompileAll()
  JITBlocks-->>DynaRecCPU: all blocks marked uncompiled
  DynaRecCPU-->>Caller: return

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Estimated code review effort

🎯 2 (Simple) | ⏱️ ~8 minutes

Poem

I nudge the cache with whiskered care,
0xff snow drifts everywhere.
JIT tracks pause, then softly fall,
uncompiled dreams await the call.
In bytes I burrow, swift and sly—
fresh paths to hop, compile, and fly. 🐇✨

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[coderabbitai]

Actionable comments posted: 0

🧹 Nitpick comments (1)

src/core/DynaRec_aa64/recompiler.h (1)

246-250: Nit: error message says “x64 JIT” in the aa64 JIT

The message can be misleading when thrown from the arm64 dynarec.

Apply this diff:

-            throw std::runtime_error("PGXP not supported in x64 JIT");
+            throw std::runtime_error("PGXP not supported in arm64 JIT");

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📥 Commits

Reviewing files that changed from the base of the PR and between 4f4a00f and 053eb57.

📒 Files selected for processing (1)

• src/core/DynaRec_aa64/recompiler.h (1 hunks)

🧰 Additional context used

🧬 Code Graph Analysis (1)

src/core/DynaRec_aa64/recompiler.h (3)

src/core/r3000a.h (2)

• void (323-326)
• void (448-451)

src/core/DynaRec_x64/recompiler.h (4)

• void (210-213)
• void (221-226)
• void (228-232)
• void (234-238)

src/core/DynaRec_aa64/recompiler.cc (2)

• uncompileAll (131-139)
• uncompileAll (131-131)

⏰ Context from checks skipped due to timeout of 90000ms. You can increase the timeout in your CodeRabbit configuration to a maximum of 15 minutes (900000ms). (11)

• GitHub Check: pcsx-redux (aarch64-linux)
• GitHub Check: pcsx-redux (x86_64-linux)
• GitHub Check: Codacy Static Code Analysis
• GitHub Check: build
• GitHub Check: coverage
• GitHub Check: build-openbios
• GitHub Check: toolchain
• GitHub Check: aur-build
• GitHub Check: macos-build-and-test-toolchain
• GitHub Check: asan
• GitHub Check: cross-arm64

🔇 Additional comments (1)

src/core/DynaRec_aa64/recompiler.h (1)

240-245: Cache invalidation integration verified—ready to merge

• The invalidateCache() override in src/core/DynaRec_aa64/recompiler.h is present and matches the x64 implementation.
• The base CPU Reset() in src/core/r3000a.h calls invalidateCache().
• All BIOS/OS “FlushCache” paths (e.g. in src/core/psxmem.cc, Lua bindings, patch manager, web server, assembly widget) invoke g_emulator->m_cpu->invalidateCache().
• JIT-internal over-size cache flushes in both x64 and aa64 use their respective flushCache() to reset code emitters and re-emit the dispatcher.

This aligns arm64 behavior with x64 semantics; no further changes needed.