Clock v2 thumbv6m

Cargo.toml

@@ -7,6 +7,8 @@ members = [
 	"pac/*",
 	"boards/*",
 ]
+# Fragments of example files, referenced by `include!()` from BSP examples
+exclude = ["boards/examples"]
 
 [profile.dev]
 debug = true

atsamd-hal-macros/devices.yaml

@@ -21,7 +21,9 @@ families:
       - serial-numbers
       - dsu
       - clock
-      - gclk
+      - xosc32k
+      - xosc: { count: 1 }
+      - gclk: { count: 6 }
       - pm
       - sysctrl
       - wdt
@@ -53,7 +55,9 @@ families:
       - serial-numbers
       - dsu
       - clock
-      - gclk
+      - xosc32k: { except: ["samd21el", "samd21gl"] }
+      - xosc: { count: 1 }
+      - gclk: { count: 8 }
       - pm
       - sysctrl
       - wdt
@@ -96,7 +100,9 @@ families:
       - cmcc
       - dsu
       - clock
-      - gclk
+      - xosc32k
+      - xosc: { count: 2 }
+      - gclk: { count: 12 }
       - mclk
       - rstc
       - ramecc

boards/atsame54_xpro/examples/blinky_rtic.rs

@@ -3,7 +3,7 @@
 
 use atsame54_xpro as bsp;
 use bsp::hal;
-use hal::clock::v2::{clock_system_at_reset, osculp32k::OscUlp1k, rtcosc::RtcOsc};
+use hal::clock::v2::{clock_system_at_reset, rtcosc::RtcOsc};
 use hal::prelude::*;
 use hal::rtc::rtic::rtc_clock;
 use panic_rtt_target as _;
@@ -27,26 +27,18 @@ mod app {
 
     #[init]
     fn init(ctx: init::Context) -> (Shared, Local) {
-        let mut device = ctx.device;
+        let device = ctx.device;
         let mut core: rtic::export::Peripherals = ctx.core;
 
         rtt_init_print!();
 
-        let (_buses, clocks, tokens) = clock_system_at_reset(
-            device.oscctrl,
-            device.osc32kctrl,
-            device.gclk,
-            device.mclk,
-            &mut device.nvmctrl,
-        );
-
-        // Enable the 1 kHz clock from the internal 32 kHz source
-        let (osculp1k, _) = OscUlp1k::enable(tokens.osculp32k.osculp1k, clocks.osculp32k_base);
+        let (_buses, clocks, tokens) =
+            clock_system_at_reset(device.oscctrl, device.osc32kctrl, device.gclk, device.mclk);
 
         // Enable the RTC clock with the 1 kHz source.
         // Note that currently the proof of this (the `RtcOsc` instance) is not
         // required to start the monotonic.
-        let _ = RtcOsc::enable(tokens.rtcosc, osculp1k);
+        let _ = RtcOsc::enable(tokens.rtcosc, clocks.osculp.osculp1k);
 
         // Start the monotonic
         Mono::start(device.rtc);

boards/atsame54_xpro/examples/mcan.rs

@@ -21,7 +21,7 @@
 
 use atsame54_xpro as bsp;
 use bsp::hal;
-use clock::{osculp32k::OscUlp1k, rtcosc::RtcOsc};
+use clock::rtcosc::RtcOsc;
 use hal::clock::v2 as clock;
 use hal::eic::{Ch15, Eic, ExtInt, Sense};
 use hal::gpio::{Interrupt as GpioInterrupt, *};
@@ -115,7 +115,7 @@ mod app {
         can_memory: SharedMemory<Capacities> = SharedMemory::new()
     ])]
     fn init(ctx: init::Context) -> (Shared, Local) {
-        let mut device = ctx.device;
+        let device = ctx.device;
 
         rtt_init_print!();
         rprintln!("Application up!");
@@ -125,16 +125,12 @@ mod app {
             device.osc32kctrl,
             device.gclk,
             device.mclk,
-            &mut device.nvmctrl,
         );
 
-        // Enable the 1 kHz clock from the internal 32 kHz source
-        let (osculp1k, _) = OscUlp1k::enable(tokens.osculp32k.osculp1k, clocks.osculp32k_base);
-
         // Enable the RTC clock with the 1 kHz source.
         // Note that currently the proof of this (the `RtcOsc` instance) is not
         // required to start the monotonic.
-        let _ = RtcOsc::enable(tokens.rtcosc, osculp1k);
+        let _ = RtcOsc::enable(tokens.rtcosc, clocks.osculp.osculp1k);
 
         // Start the monotonic
         Mono::start(device.rtc);

boards/examples/m4-adc.rs

@@ -0,0 +1,63 @@
+// This file is included by one or more BSP examples.  In normal usage, firmware
+// source code needs to start with something like:
+//
+// ```
+// #![no_std]
+// #![no_main]
+// use feather_m4 as bsp;
+//```
+
+use atsamd_hal::adc::AdcBuilder;
+
+use bsp::hal;
+use bsp::pac;
+
+#[cfg(not(feature = "use_semihosting"))]
+use panic_halt as _;
+#[cfg(feature = "use_semihosting")]
+use panic_semihosting as _;
+
+use bsp::entry;
+use bsp::Pins;
+use pac::{CorePeripherals, Peripherals};
+
+use hal::{
+    adc::{Accumulation, Prescaler},
+    clock::v2::{clock_system_at_reset, pclk::Pclk},
+};
+
+#[entry]
+fn main() -> ! {
+    let peripherals = Peripherals::take().unwrap();
+    let _core = CorePeripherals::take().unwrap();
+
+    let pins = Pins::new(peripherals.port);
+
+    let (mut buses, clocks, tokens) = clock_system_at_reset(
+        peripherals.oscctrl,
+        peripherals.osc32kctrl,
+        peripherals.gclk,
+        peripherals.mclk,
+    );
+
+    // Enable the ADC0 ABP clock...
+    let apb_adc0 = buses.apb.enable(tokens.apbs.adc0);
+    // ...and enable the ADC0 PCLK. Both of these are required for the
+    // ADC to run.
+    let (pclk_adc0, _gclk0) = Pclk::enable(tokens.pclks.adc0, clocks.gclk0);
+
+    let mut adc = AdcBuilder::new(Accumulation::single(atsamd_hal::adc::AdcResolution::_12))
+        .with_clock_cycles_per_sample(5)
+        // Overruns if clock divider < 32 in debug mode
+        .with_clock_divider(Prescaler::Div32)
+        .with_vref(atsamd_hal::adc::Reference::Arefa)
+        .enable(peripherals.adc0, apb_adc0, &pclk_adc0)
+        .unwrap();
+    let mut adc_pin = pins.a0.into_alternate();
+
+    loop {
+        let res = adc.read(&mut adc_pin);
+        #[cfg(feature = "use_semihosting")]
+        let _ = cortex_m_semihosting::hprintln!("ADC value: {}", res);
+    }
+}

boards/examples/m4-blinky_rtic.rs

@@ -0,0 +1,82 @@
+// Blink an led using an RTIC software task and the RTC-based monotonic.
+//
+// This file is included by one or more BSP examples.  In normal usage, firmware
+// source code needs to start with something like:
+//
+// ```
+// #![no_std]
+// #![no_main]
+// use feather_m4 as bsp;
+//```
+
+use bsp::{hal, Pins, RedLed};
+#[cfg(not(feature = "use_semihosting"))]
+use panic_halt as _;
+#[cfg(feature = "use_semihosting")]
+use panic_semihosting as _;
+
+use hal::clock::v2::{clock_system_at_reset, rtcosc::RtcOsc};
+use hal::prelude::*;
+use hal::rtc::rtic::rtc_clock;
+use rtic::app;
+
+hal::rtc_monotonic!(Mono, rtc_clock::Clock1k);
+
+#[app(device = bsp::pac, dispatchers = [EVSYS_0])]
+mod app {
+    use super::*;
+
+    #[local]
+    struct Resources {}
+
+    #[shared]
+    struct Shared {
+        // The LED could be a local resource, since it is only used in one task
+        // But we want to showcase shared resources and locking
+        red_led: RedLed,
+    }
+
+    #[init]
+    fn init(cx: init::Context) -> (Shared, Resources) {
+        let device = cx.device;
+        let mut core: rtic::export::Peripherals = cx.core;
+
+        // Use v2 of the clocks API so that we can set the RTC clock source
+        let (_, clocks, tokens) =
+            clock_system_at_reset(device.oscctrl, device.osc32kctrl, device.gclk, device.mclk);
+
+        // Enable the RTC clock with the internal 1 kHz source.
+        // Note that currently the proof of this (the `RtcOsc` instance) is not
+        // required to start the monotonic.
+        let _ = RtcOsc::enable(tokens.rtcosc, clocks.osculp.osculp1k);
+
+        // Start the monotonic
+        Mono::start(device.rtc);
+
+        let pins = Pins::new(device.port);
+
+        // We can use the RTC in standby for maximum power savings
+        core.SCB.set_sleepdeep();
+
+        blink_led::spawn().ok().unwrap();
+
+        (
+            Shared {
+                red_led: pins.d13.into_push_pull_output(),
+            },
+            Resources {},
+        )
+    }
+
+    /// This function is spawned and never returns.
+    #[task(priority = 1, shared=[red_led])]
+    async fn blink_led(mut cx: blink_led::Context) {
+        loop {
+            // If the LED were a local resource, the lock would not be necessary
+            cx.shared.red_led.lock(|led| {
+                led.toggle().unwrap();
+            });
+            Mono::delay(400u64.millis()).await;
+        }
+    }
+}

boards/feather_m4/examples/adc.rs

@@ -1,59 +1,5 @@
 #![no_std]
 #![no_main]
 
-use atsamd_hal::adc::AdcBuilder;
 use feather_m4 as bsp;
-
-use bsp::hal;
-use bsp::pac;
-
-#[cfg(not(feature = "use_semihosting"))]
-use panic_halt as _;
-#[cfg(feature = "use_semihosting")]
-use panic_semihosting as _;
-
-use bsp::entry;
-use bsp::Pins;
-use pac::{CorePeripherals, Peripherals};
-
-use hal::{
-    adc::{Accumulation, Adc, Prescaler, Resolution},
-    clock::v2::{clock_system_at_reset, pclk::Pclk},
-};
-
-#[entry]
-fn main() -> ! {
-    let mut peripherals = Peripherals::take().unwrap();
-    let _core = CorePeripherals::take().unwrap();
-
-    let pins = Pins::new(peripherals.port);
-
-    let (mut buses, clocks, tokens) = clock_system_at_reset(
-        peripherals.oscctrl,
-        peripherals.osc32kctrl,
-        peripherals.gclk,
-        peripherals.mclk,
-        &mut peripherals.nvmctrl,
-    );
-
-    // Enable the ADC0 ABP clock...
-    let apb_adc0 = buses.apb.enable(tokens.apbs.adc0);
-    // ...and enable the ADC0 PCLK. Both of these are required for the
-    // ADC to run.
-    let (pclk_adc0, _gclk0) = Pclk::enable(tokens.pclks.adc0, clocks.gclk0);
-
-    let mut adc = AdcBuilder::new(Accumulation::single(atsamd_hal::adc::AdcResolution::_12))
-        .with_clock_cycles_per_sample(5)
-        // Overruns if clock divider < 32 in debug mode
-        .with_clock_divider(Prescaler::Div32)
-        .with_vref(atsamd_hal::adc::Reference::Arefa)
-        .enable(peripherals.adc0, apb_adc0, &pclk_adc0)
-        .unwrap();
-    let mut adc_pin = pins.a0.into_alternate();
-
-    loop {
-        let res = adc.read(&mut adc_pin);
-        #[cfg(feature = "use_semihosting")]
-        cortex_m_semihosting::hprintln!("ADC value: {}", res);
-    }
-}
+include!("../../examples/m4-adc.rs");