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@pguyot pguyot commented Oct 19, 2025

Continuation of:

Initial implementation of riscv32 assembler and backend. Tested on unix with qemu-user and on esp32c3.

  native (w42/jit-riscv) -- 2a93583 emulated (main) -- f8bdc7d %
pingpong_speed_test 13494702 51717135 74 %
prime_speed_test 9976144 28151722 65 %
prng_test 1246860 1993737 37 %
pi_test 27677061 35485204 22 %
sudoku_solution_test 4297754 5672230 24 %
sudoku_puzzle_test 176939584 277931484 36 %

These changes are made under both the "Apache 2.0" and the "GNU Lesser General
Public License 2.1 or later" license terms (dual license).

SPDX-License-Identifier: Apache-2.0 OR LGPL-2.1-or-later

@pguyot pguyot mentioned this pull request Oct 19, 2025
@pguyot pguyot force-pushed the w42/jit-riscv32 branch 4 times, most recently from f52b03a to 388ea71 Compare October 22, 2025 18:03
pguyot added 19 commits October 23, 2025 22:15
Use a cache to remember tail calls that were already implemented and
replace further implementations of the same tail call with a jump to the
previous implementation.

Coverage shows that all cases are covered in libs/estdlib/src and libs/jit/src:

OP_RETURN: 50 misses, 1735 hits (97%)
OP_JUMP/OP_CALL_LAST/OP_CALL_ONLY: 656 misses, 389 hits (37%)
OP_CALL_LAST: 220 misses, 206 hits (48%)
OP_FUNC_INFO: 58 misses, 1619 hits (97%)

Signed-off-by: Paul Guyot <[email protected]>
This is required as flash chips are programmed by setting bits from 1 to 0,
and erased by setting all bits to 0, so placeholders set to FF can be
replaced without erasing a whole block.

Signed-off-by: Paul Guyot <[email protected]>
- Add riscv32 to AVM_PRECOMPILED_TARGETS
- Enable ENABLE_TRACE for debugging
- Add riscv32 directory handling in test.c

Signed-off-by: Paul Guyot <[email protected]>
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