projects/ad469x_evb: change intel projects to pll-provided 160mhz clock #1751
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
PR Description
Currently, the ad469x_evb/de10nano tries to use the HPS generated clock as a source of 160MHz clock.
However, this is automatically limited to 100MHz, due to part limitations: #1749 (comment)
https://www.intel.com/content/www/us/en/support/programmable/articles/000084690.html
This PR changes it so the 160MHz clock is generated by a PLL.
PR Type
PR Checklist