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Switch devices to new m0ic M0 IRQ controller
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arch/riscv/boot/dts/bouffalolab/bl808.dtsi

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -82,8 +82,7 @@
8282

8383
interrupt-controller;
8484
#interrupt-cells = <2>;
85-
interrupts-extended = <&ipclic BFLB_IPC_SOURCE_M0
86-
BFLB_IPC_DEVICE_GPIO IRQ_TYPE_EDGE_RISING>;
85+
interrupts-extended = <&m0ic 44>;
8786

8887
sdh_pins: sdh-pins {
8988
pins = "GPIO0", "GPIO1", "GPIO2", "GPIO3", "GPIO4", "GPIO5";
@@ -98,6 +97,7 @@
9897
};
9998

10099
uart0: serial@30002000 {
100+
/*Maps to hardware UART 3*/
101101
compatible = "bflb,bl808-uart";
102102
reg = <0x30002000 0x1000>;
103103
interrupts = <20 IRQ_TYPE_LEVEL_HIGH>;
@@ -106,43 +106,34 @@
106106
};
107107

108108
uart1: serial@0x2000AA00 {
109+
/*Maps to hardware UART 2*/
109110
compatible = "bflb,bl808-uart";
110111
reg = <0x2000AA00 0x0100>;
111-
interrupts-extended = <&ipclic BFLB_IPC_SOURCE_M0
112-
BFLB_IPC_DEVICE_UART2
113-
IRQ_TYPE_EDGE_RISING>;
114-
mboxes = <&ipclic BFLB_IPC_SOURCE_M0 BFLB_IPC_DEVICE_UART2>;
112+
interrupts-extended = <&m0ic 30>;
115113
clocks = <&xtal>;
116114
status = "disabled";
117115
};
118116

119117
sdhci0: sdhci@20060000 {
120118
compatible = "bflb,bl808-sdhci";
121119
reg = <0x20060000 0x100>;
122-
interrupts-extended = <&ipclic BFLB_IPC_SOURCE_M0
123-
BFLB_IPC_DEVICE_SDHCI
124-
IRQ_TYPE_EDGE_RISING>;
125-
mboxes = <&ipclic BFLB_IPC_SOURCE_M0 BFLB_IPC_DEVICE_SDHCI>;
120+
interrupts-extended = <&m0ic 17>;
126121
clocks = <&sdh>;
127122
status = "disabled";
128123
};
129124

130125
ehci0: usb@20072000 {
131126
compatible = "generic-ehci";
132127
reg = <0x20072000 0x1000>;
133-
interrupts-extended = <&ipclic BFLB_IPC_SOURCE_M0
134-
BFLB_IPC_DEVICE_USB
135-
IRQ_TYPE_EDGE_RISING>;
128+
interrupts-extended = <&m0ic 21>;
136129
clocks = <&xtal>;
137130
status = "disabled";
138131
};
139132

140133
enet0: emac@20070000 {
141134
compatible = "opencores,ethoc";
142135
reg = <0x20070000 0x1000>;
143-
interrupts-extended = <&ipclic BFLB_IPC_SOURCE_M0
144-
BFLB_IPC_DEVICE_EMAC
145-
IRQ_TYPE_EDGE_RISING>;
136+
interrupts-extended = <&m0ic 24>;
146137
clocks = <&enet>;
147138
status = "disabled";
148139
};
@@ -160,6 +151,15 @@
160151
status = "disabled";
161152
};
162153

154+
m0ic: mcu-interrupt-controller@20000050 {
155+
compatible = "bflb,bl808-mcu-irq";
156+
reg = <0x20000050 0x18>;
157+
interrupts = <81 IRQ_TYPE_LEVEL_HIGH>;
158+
interrupt-controller;
159+
#address-cells = <0>;
160+
#interrupt-cells = <1>;
161+
};
162+
163163
plic: interrupt-controller@e0000000 {
164164
compatible = "thead,c900-plic";
165165
reg = <0xe0000000 0x4000000>;
@@ -168,7 +168,7 @@
168168
interrupt-controller;
169169
#address-cells = <0>;
170170
#interrupt-cells = <2>;
171-
riscv,ndev = <64>;
171+
riscv,ndev = <82>;
172172
};
173173

174174
clint: timer@e4000000 {

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