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Merge tag 'v4.14.271' into mptcp_v0.94
This is the 4.14.271 stable release Signed-off-by: Matthieu Baerts <[email protected]> # gpg: Signature made Fri Mar 11 09:13:39 2022 UTC # gpg: using RSA key 647F28654894E3BD457199BE38DBBDC86092693E # gpg: Note: trustdb not writable # gpg: Good signature from "Greg Kroah-Hartman <[email protected]>" [unknown] # gpg: aka "Greg Kroah-Hartman <[email protected]>" [unknown] # gpg: aka "Greg Kroah-Hartman (Linux kernel stable release signing key) <[email protected]>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 647F 2865 4894 E3BD 4571 99BE 38DB BDC8 6092 693E
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Documentation/admin-guide/hw-vuln/spectre.rst

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@@ -60,8 +60,8 @@ privileged data touched during the speculative execution.
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Spectre variant 1 attacks take advantage of speculative execution of
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conditional branches, while Spectre variant 2 attacks use speculative
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execution of indirect branches to leak privileged memory.
63-
See :ref:`[1] <spec_ref1>` :ref:`[5] <spec_ref5>` :ref:`[7] <spec_ref7>`
64-
:ref:`[10] <spec_ref10>` :ref:`[11] <spec_ref11>`.
63+
See :ref:`[1] <spec_ref1>` :ref:`[5] <spec_ref5>` :ref:`[6] <spec_ref6>`
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:ref:`[7] <spec_ref7>` :ref:`[10] <spec_ref10>` :ref:`[11] <spec_ref11>`.
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Spectre variant 1 (Bounds Check Bypass)
6767
---------------------------------------
@@ -131,6 +131,19 @@ steer its indirect branch speculations to gadget code, and measure the
131131
speculative execution's side effects left in level 1 cache to infer the
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victim's data.
133133

134+
Yet another variant 2 attack vector is for the attacker to poison the
135+
Branch History Buffer (BHB) to speculatively steer an indirect branch
136+
to a specific Branch Target Buffer (BTB) entry, even if the entry isn't
137+
associated with the source address of the indirect branch. Specifically,
138+
the BHB might be shared across privilege levels even in the presence of
139+
Enhanced IBRS.
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141+
Currently the only known real-world BHB attack vector is via
142+
unprivileged eBPF. Therefore, it's highly recommended to not enable
143+
unprivileged eBPF, especially when eIBRS is used (without retpolines).
144+
For a full mitigation against BHB attacks, it's recommended to use
145+
retpolines (or eIBRS combined with retpolines).
146+
134147
Attack scenarios
135148
----------------
136149

@@ -364,13 +377,15 @@ The possible values in this file are:
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- Kernel status:
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367-
==================================== =================================
368-
'Not affected' The processor is not vulnerable
369-
'Vulnerable' Vulnerable, no mitigation
370-
'Mitigation: Full generic retpoline' Software-focused mitigation
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'Mitigation: Full AMD retpoline' AMD-specific software mitigation
372-
'Mitigation: Enhanced IBRS' Hardware-focused mitigation
373-
==================================== =================================
380+
======================================== =================================
381+
'Not affected' The processor is not vulnerable
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'Mitigation: None' Vulnerable, no mitigation
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'Mitigation: Retpolines' Use Retpoline thunks
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'Mitigation: LFENCE' Use LFENCE instructions
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'Mitigation: Enhanced IBRS' Hardware-focused mitigation
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'Mitigation: Enhanced IBRS + Retpolines' Hardware-focused + Retpolines
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'Mitigation: Enhanced IBRS + LFENCE' Hardware-focused + LFENCE
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======================================== =================================
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375390
- Firmware status: Show if Indirect Branch Restricted Speculation (IBRS) is
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used to protect against Spectre variant 2 attacks when calling firmware (x86 only).
@@ -584,12 +599,13 @@ kernel command line.
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Specific mitigations can also be selected manually:
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587-
retpoline
588-
replace indirect branches
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retpoline,generic
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google's original retpoline
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retpoline,amd
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AMD-specific minimal thunk
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retpoline auto pick between generic,lfence
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retpoline,generic Retpolines
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retpoline,lfence LFENCE; indirect branch
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retpoline,amd alias for retpoline,lfence
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eibrs enhanced IBRS
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eibrs,retpoline enhanced IBRS + Retpolines
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eibrs,lfence enhanced IBRS + LFENCE
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Not specifying this option is equivalent to
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spectre_v2=auto.
@@ -730,7 +746,7 @@ AMD white papers:
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.. _spec_ref6:
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733-
[6] `Software techniques for managing speculation on AMD processors <https://developer.amd.com/wp-content/resources/90343-B_SoftwareTechniquesforManagingSpeculation_WP_7-18Update_FNL.pdf>`_.
749+
[6] `Software techniques for managing speculation on AMD processors <https://developer.amd.com/wp-content/resources/Managing-Speculation-on-AMD-Processors.pdf>`_.
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ARM white papers:
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Documentation/admin-guide/kernel-parameters.txt

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@@ -4150,8 +4150,12 @@
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Specific mitigations can also be selected manually:
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retpoline - replace indirect branches
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retpoline,generic - google's original retpoline
4154-
retpoline,amd - AMD-specific minimal thunk
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retpoline,generic - Retpolines
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retpoline,lfence - LFENCE; indirect branch
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retpoline,amd - alias for retpoline,lfence
4156+
eibrs - enhanced IBRS
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eibrs,retpoline - enhanced IBRS + Retpolines
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eibrs,lfence - enhanced IBRS + LFENCE
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Not specifying this option is equivalent to
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spectre_v2=auto.

Documentation/sysctl/kernel.txt

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@@ -91,6 +91,7 @@ show up in /proc/sys/kernel:
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- sysctl_writes_strict
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- tainted
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- threads-max
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- unprivileged_bpf_disabled
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- unknown_nmi_panic
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- watchdog
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- watchdog_thresh
@@ -999,6 +1000,26 @@ available RAM pages threads-max is reduced accordingly.
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10001001
==============================================================
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unprivileged_bpf_disabled:
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Writing 1 to this entry will disable unprivileged calls to bpf();
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once disabled, calling bpf() without CAP_SYS_ADMIN will return
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-EPERM. Once set to 1, this can't be cleared from the running kernel
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anymore.
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1010+
Writing 2 to this entry will also disable unprivileged calls to bpf(),
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however, an admin can still change this setting later on, if needed, by
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writing 0 or 1 to this entry.
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1014+
If BPF_UNPRIV_DEFAULT_OFF is enabled in the kernel config, then this
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entry will default to 2 instead of 0.
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0 - Unprivileged calls to bpf() are enabled
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1 - Unprivileged calls to bpf() are disabled without recovery
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2 - Unprivileged calls to bpf() are disabled
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==============================================================
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unknown_nmi_panic:
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The value in this file affects behavior of handling NMI. When the

Makefile

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@@ -1,7 +1,7 @@
11
# SPDX-License-Identifier: GPL-2.0
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VERSION = 4
33
PATCHLEVEL = 14
4-
SUBLEVEL = 265
4+
SUBLEVEL = 271
55
EXTRAVERSION =
66
NAME = Petit Gorille
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arch/arm/boot/dts/imx23-evk.dts

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@@ -48,7 +48,6 @@
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MX23_PAD_LCD_RESET__GPIO_1_18
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MX23_PAD_PWM3__GPIO_1_29
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MX23_PAD_PWM4__GPIO_1_30
51-
MX23_PAD_SSP1_DETECT__SSP1_DETECT
5251
>;
5352
fsl,drive-strength = <MXS_DRIVE_4mA>;
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fsl,voltage = <MXS_VOLTAGE_HIGH>;

arch/arm/boot/dts/imx6qdl-udoo.dtsi

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@@ -9,6 +9,8 @@
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*
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*/
1111

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#include <dt-bindings/gpio/gpio.h>
13+
1214
/ {
1315
aliases {
1416
backlight = &backlight;
@@ -201,6 +203,7 @@
201203
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
202204
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
203205
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
206+
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
204207
>;
205208
};
206209

@@ -267,7 +270,7 @@
267270
&usdhc3 {
268271
pinctrl-names = "default";
269272
pinctrl-0 = <&pinctrl_usdhc3>;
270-
non-removable;
273+
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
271274
status = "okay";
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};
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arch/arm/boot/dts/meson.dtsi

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@@ -86,14 +86,14 @@
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};
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8888
uart_A: serial@84c0 {
89-
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
89+
compatible = "amlogic,meson6-uart";
9090
reg = <0x84c0 0x18>;
9191
interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
9292
status = "disabled";
9393
};
9494

9595
uart_B: serial@84dc {
96-
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
96+
compatible = "amlogic,meson6-uart";
9797
reg = <0x84dc 0x18>;
9898
interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
9999
status = "disabled";
@@ -131,7 +131,7 @@
131131
};
132132

133133
uart_C: serial@8700 {
134-
compatible = "amlogic,meson6-uart", "amlogic,meson-uart";
134+
compatible = "amlogic,meson6-uart";
135135
reg = <0x8700 0x18>;
136136
interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
137137
status = "disabled";
@@ -196,7 +196,7 @@
196196
};
197197

198198
uart_AO: serial@4c0 {
199-
compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart", "amlogic,meson-uart";
199+
compatible = "amlogic,meson6-uart", "amlogic,meson-ao-uart";
200200
reg = <0x4c0 0x18>;
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interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";

arch/arm/include/asm/assembler.h

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110110
.endm
111111
#endif
112112

113+
#if __LINUX_ARM_ARCH__ < 7
114+
.macro dsb, args
115+
mcr p15, 0, r0, c7, c10, 4
116+
.endm
117+
118+
.macro isb, args
119+
mcr p15, 0, r0, c7, c5, 4
120+
.endm
121+
#endif
122+
113123
.macro asm_trace_hardirqs_off, save=1
114124
#if defined(CONFIG_TRACE_IRQFLAGS)
115125
.if \save

arch/arm/include/asm/spectre.h

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@@ -0,0 +1,32 @@
1+
/* SPDX-License-Identifier: GPL-2.0-only */
2+
3+
#ifndef __ASM_SPECTRE_H
4+
#define __ASM_SPECTRE_H
5+
6+
enum {
7+
SPECTRE_UNAFFECTED,
8+
SPECTRE_MITIGATED,
9+
SPECTRE_VULNERABLE,
10+
};
11+
12+
enum {
13+
__SPECTRE_V2_METHOD_BPIALL,
14+
__SPECTRE_V2_METHOD_ICIALLU,
15+
__SPECTRE_V2_METHOD_SMC,
16+
__SPECTRE_V2_METHOD_HVC,
17+
__SPECTRE_V2_METHOD_LOOP8,
18+
};
19+
20+
enum {
21+
SPECTRE_V2_METHOD_BPIALL = BIT(__SPECTRE_V2_METHOD_BPIALL),
22+
SPECTRE_V2_METHOD_ICIALLU = BIT(__SPECTRE_V2_METHOD_ICIALLU),
23+
SPECTRE_V2_METHOD_SMC = BIT(__SPECTRE_V2_METHOD_SMC),
24+
SPECTRE_V2_METHOD_HVC = BIT(__SPECTRE_V2_METHOD_HVC),
25+
SPECTRE_V2_METHOD_LOOP8 = BIT(__SPECTRE_V2_METHOD_LOOP8),
26+
};
27+
28+
void spectre_v2_update_state(unsigned int state, unsigned int methods);
29+
30+
int spectre_bhb_update_vectors(unsigned int method);
31+
32+
#endif

arch/arm/kernel/Makefile

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@@ -101,4 +101,6 @@ endif
101101

102102
obj-$(CONFIG_HAVE_ARM_SMCCC) += smccc-call.o
103103

104+
obj-$(CONFIG_GENERIC_CPU_VULNERABILITIES) += spectre.o
105+
104106
extra-y := $(head-y) vmlinux.lds

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