@@ -2177,6 +2177,14 @@ void EmitPass::EmitAluIntrinsic(llvm::CallInst* I, const SSource source[2], cons
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}
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break;
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}
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+ case Intrinsic::exp2:
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+ {
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+ if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) && source[0].value->getType()->isVectorTy()) {
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+ Exp2(source, modifier);
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+ }
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+ else EmitSimpleAlu(I, source, modifier);
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+ break;
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+ }
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case Intrinsic::powi:
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Powi(source, modifier);
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break;
@@ -4488,22 +4496,6 @@ void EmitPass::BinaryUnary(llvm::Instruction* inst, const SSource source[2], con
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}
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}
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- void EmitPass::Sub(const SSource sources[2], const DstModifier& modifier)
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- {
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- CVariable* src0 = GetSrcVariable(sources[0]);
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- CVariable* src1 = GetSrcVariable(sources[1]);
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- e_modifier mod1 = CombineModifier(EMOD_NEG, sources[1].mod);
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-
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- m_encoder->SetDstModifier(modifier);
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- SetSourceModifiers(0, sources[0]);
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- SetSourceModifiers(1, sources[1]);
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- // override modifier of source 1
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- m_encoder->SetSrcModifier(1, mod1);
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- m_encoder->Add(m_destination, src0, src1);
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- m_encoder->Push();
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-
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- }
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-
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void EmitPass::Mul64(CVariable* dst, CVariable* src[2], SIMDMode simdMode, bool noMask) const
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{
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@@ -4732,6 +4724,68 @@ void EmitPass::FPTrunc(const SSource sources[2], const DstModifier& modifier) {
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}
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}
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+ void EmitPass::Sub(const SSource sources[2], const DstModifier& modifier)
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+ {
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+ CVariable* src[2];
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+ for (int i = 0; i < 2; ++i)
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+ {
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+ src[i] = GetSrcVariable(sources[i]);
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+ }
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+ e_modifier mod1 = CombineModifier(EMOD_NEG, sources[1].mod);
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+
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+ if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) &&
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+ sources[0].value->getType()->isVectorTy() &&
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+ sources[1].value->getType()->isVectorTy()) {
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+
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+ IGC_ASSERT_EXIT_MESSAGE(m_encoder->GetSimdSize() == lanesToSIMDMode(16), "As of now Vector Emission is only supported for SIMD16");
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+
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+ unsigned VectorSize = getVectorSize(sources[0].value);
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+
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+ bool AllUniform = src[0]->IsUniform() && src[1]->IsUniform() && m_destination->IsUniform();
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+
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+ if (IGC_IS_FLAG_ENABLED(VectorizerUniformValueVectorizationEnabled) && AllUniform && VectorSize <= 16) {
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+ m_encoder->SetSrcModifier(1, mod1);
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+ m_encoder->SetSrcRegion(0, 1, 1, 0);
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+ m_encoder->SetSrcRegion(1, 1, 1, 0);
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+ m_encoder->SetUniformSIMDSize(lanesToSIMDMode(VectorSize));
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+ m_encoder->Add(m_destination, src[0], src[1]);
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+ m_encoder->Push();
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+ return;
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+ }
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+
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+ for (unsigned i = 0; i < VectorSize; ++i) {
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+ SetSourceModifiers(0, sources[0]);
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+ SetSourceModifiers(1, sources[1]);
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+ m_encoder->SetSrcModifier(1, mod1);
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+
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+ if (src[0]->IsUniform())
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+ m_encoder->SetSrcSubReg(0, i);
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+ else
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+ m_encoder->SetSrcSubVar(0, i);
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+ if (src[1]->IsUniform())
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+ m_encoder->SetSrcSubReg(1, i);
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+ else
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+ m_encoder->SetSrcSubVar(1, i);
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+
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+ if (src[0]->IsUniform() && src[1]->IsUniform()) m_encoder->SetDstSubReg(i);
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+ else m_encoder->SetDstSubVar(i);
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+
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+ m_encoder->Add(m_destination, src[0], src[1]);
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+ m_encoder->Push();
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+ }
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+ return;
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+ }
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+
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+ m_encoder->SetDstModifier(modifier);
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+ SetSourceModifiers(0, sources[0]);
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+ SetSourceModifiers(1, sources[1]);
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+ // override modifier of source 1
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+ m_encoder->SetSrcModifier(1, mod1);
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+ m_encoder->Add(m_destination, src[0], src[1]);
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+ m_encoder->Push();
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+ }
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+
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+
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void EmitPass::Add(const SSource sources[2], const DstModifier& modifier)
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{
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CVariable* src[2];
@@ -4874,7 +4928,6 @@ void EmitPass::Div(const SSource sources[2], const DstModifier& modifier)
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sources[0].value->getType()->isVectorTy() &&
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sources[1].value->getType()->isVectorTy()) {
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- llvm::errs() << numLanes(m_encoder->GetSimdSize()) << "\n";
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IGC_ASSERT_EXIT_MESSAGE(numLanes(m_encoder->GetSimdSize()) == 16, "As of now Vector Emission is only supported for SIMD16");
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unsigned VectorSize = getVectorSize(sources[0].value);
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@@ -4907,7 +4960,8 @@ void EmitPass::Inv(const SSource sources[2], const DstModifier& modifier) {
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unsigned VectorSize = getVectorSize(sources[0].value);
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CVariable* src[1];
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- // sources[0] got used to check that it contains all 1
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+ // sources[0] was used to check that it contains all 1
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+ // that's why we are in INV
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src[0] = GetSrcVariable(sources[1]);
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for (unsigned i = 0; i < VectorSize; ++i) {
@@ -4928,6 +4982,45 @@ void EmitPass::Inv(const SSource sources[2], const DstModifier& modifier) {
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return;
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}
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+ void EmitPass::Exp2(const SSource sources[2], const DstModifier& modifier) {
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+
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+ if (IGC_IS_FLAG_ENABLED(EnableVectorEmitter) &&
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+ sources[0].value->getType()->isVectorTy()) {
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+
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+ IGC_ASSERT_EXIT_MESSAGE(m_encoder->GetSimdSize() == lanesToSIMDMode(16), "As of now Vector Emission is only supported for SIMD16");
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+
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+ unsigned VectorSize = getVectorSize(sources[0].value);
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+
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+ CVariable* src[1];
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+ src[0] = GetSrcVariable(sources[0]);
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+ bool AllUniform = src[0]->IsUniform() && m_destination->IsUniform();
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+
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+ if (IGC_IS_FLAG_ENABLED(VectorizerUniformValueVectorizationEnabled) && AllUniform && VectorSize <= 16) {
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+ m_encoder->SetSrcRegion(0, 1, 1, 0);
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+ m_encoder->SetUniformSIMDSize(lanesToSIMDMode(VectorSize));
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+ m_encoder->Exp(m_destination, src[0]);
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+ m_encoder->Push();
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+ return;
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+ }
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+
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+ for (unsigned i = 0; i < VectorSize; ++i) {
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+ SetSourceModifiers(0, sources[0]);
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+
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+ if (AllUniform) {
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+ m_encoder->SetSrcSubReg(0, i);
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+ m_encoder->SetDstSubReg(i);
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+ }
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+ else {
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+ m_encoder->SetSrcSubVar(0, i);
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+ m_encoder->SetDstSubVar(i);
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+ }
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+ m_encoder->Exp(m_destination, src[0]);
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+ m_encoder->Push();
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+ }
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+ }
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+ return;
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+ }
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+
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void EmitPass::VectorMad(const SSource sources[3], const DstModifier& modifier) {
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