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1 parent 14a7f73 commit 12f45a1Copy full SHA for 12f45a1
asmcomp/riscv/proc.ml
@@ -286,7 +286,8 @@ let prologue_required fd =
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frame_required fd
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(* See
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- https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md *)
+ https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc
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+*)
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let int_dwarf_reg_numbers =
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[| 10; 11; 12; 13; 14; 15; 16; 17;
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