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0f3fc73
accl: Adding src code for PushEngine.
mahyarsamani Jan 31, 2022
0dd0beb
Adding implementation for PushEngine (wip).
mahyarsamani Feb 8, 2022
3b359ad
Adding util source code.
mahyarsamani Feb 13, 2022
f74e9df
Adding the first version of Apply engine
marjanfariborz Jan 31, 2022
7945cf3
Portotyping memory interface
marjanfariborz Feb 6, 2022
14426cd
[wip] Improving the implementation. Adding address range, python params.
marjanfariborz Feb 11, 2022
8e79d19
[wip] minor fixes to Apply engine
marjanfariborz Feb 11, 2022
469a8f7
Worklist engine implementation
marjanfariborz Feb 7, 2022
af73e98
[wip] Adding the python file to the WLE
marjanfariborz Feb 11, 2022
23e3f42
Changing some small errors
marjanfariborz Feb 13, 2022
495fc75
[wip] using util in the creating memory packets
marjanfariborz Feb 14, 2022
394ffeb
Completing PushEngine.
mahyarsamani Feb 14, 2022
a13dcdb
arch: Accelerator
marjanfariborz Feb 14, 2022
d65b96c
Addin simobject file and startup for PushEngine.
mahyarsamani Feb 14, 2022
fb64f7d
Bug fixes.
mahyarsamani Feb 14, 2022
9eeb018
More bug fixes.
mahyarsamani Feb 14, 2022
6efe411
Even more bug fixes.
mahyarsamani Feb 14, 2022
fcdcceb
Bug fixes, bug fixes everywhere.
mahyarsamani Feb 14, 2022
750510f
arch: Debugging worklist engine
marjanfariborz Feb 15, 2022
79429d1
Bug fix.
mahyarsamani Feb 15, 2022
228fcf0
Bug fix.
mahyarsamani Feb 15, 2022
709a215
Fixing a bug-fix.
mahyarsamani Feb 15, 2022
c1dd68a
fixing some bugs
marjanfariborz Feb 15, 2022
90800d5
Bug fix.
mahyarsamani Feb 15, 2022
f62d592
Bug fix.
mahyarsamani Feb 15, 2022
e4cbf34
Bug fixes.
mahyarsamani Feb 15, 2022
b1e3386
Bug fix.
mahyarsamani Feb 15, 2022
4541367
Bug fix.
mahyarsamani Feb 15, 2022
eb31d03
Apply engine compiles
marjanfariborz Feb 16, 2022
e3a7f1c
Bug fix. Very close to first compilation.
mahyarsamani Feb 16, 2022
099f689
More bug fixes.
mahyarsamani Feb 16, 2022
793d755
Compilation. yeay.
mahyarsamani Feb 16, 2022
5e05fe3
Fixing a typo.
mahyarsamani Feb 16, 2022
f35e40e
Restructuring the directory.
mahyarsamani Feb 18, 2022
d02f382
Restructing the classes.
marjanfariborz Feb 20, 2022
bfb1279
Sperating WLEngine and BaseWLEngine + few changes in BaseApplyEngine
marjanfariborz Feb 20, 2022
bfdec93
Restructuring classes.
mahyarsamani Feb 20, 2022
3f798df
Adding RequestorID
marjanfariborz Feb 20, 2022
d8680ee
Definining MPU interfaces.
mahyarsamani Feb 20, 2022
1b1bbac
Adding changes to ApplyEngine and WLEngine
marjanfariborz Feb 20, 2022
64080f2
Finished restructured for ApplyE and WLE, pre-compiled
marjanfariborz Feb 21, 2022
c6ce909
Finished restructure for PushEngine. Pre-compile.
mahyarsamani Feb 21, 2022
8a2dae8
Debugging.
marjanfariborz Feb 21, 2022
c57c564
Lots of debugging.
mahyarsamani Feb 21, 2022
8967f89
Style fix.
mahyarsamani Feb 21, 2022
fa48d32
Adding PARAMS macro.
mahyarsamani Feb 21, 2022
9a5245c
First compilation after restructure.
mahyarsamani Feb 21, 2022
c3b4c74
Adding config file for SEGA and missing ports.
mahyarsamani Feb 22, 2022
7be5866
Adding BaseEngine class and started pointer fix.
mahyarsamani Feb 22, 2022
1bf60b6
Cont. fixing pointer issue.
mahyarsamani Feb 23, 2022
a8a3d0d
Cont. fix pointer issue.
mahyarsamani Feb 23, 2022
5a59554
Cont. fix pointer issue. MemQ to BaseEngine.
mahyarsamani Feb 23, 2022
4d2ad56
Pointer issue fixed.
mahyarsamani Feb 23, 2022
39883a6
Adding BaseEngine to SConscript.
mahyarsamani Feb 23, 2022
adfa21a
Compilation issues fixed. Still linking issues.
mahyarsamani Feb 23, 2022
05771a0
Removing unnecessary includes.
mahyarsamani Feb 23, 2022
01b4b2a
Fixing the issue of calling pure virtual function.
mahyarsamani Feb 23, 2022
235746c
Fixed cycle in hierarchy and config. Sim starts.
mahyarsamani Feb 24, 2022
d66efdf
Started fixing memory leak.
mahyarsamani Feb 24, 2022
df1340a
Adding newlines.
mahyarsamani Feb 24, 2022
ef0f966
Removed the UpdateWL from the MemCmd.
marjanfariborz Feb 24, 2022
acfffa3
Adding initial update. Fixing some bugs.
mahyarsamani Feb 25, 2022
75825c3
Adding few debugging flags.
marjanfariborz Feb 25, 2022
d3f342c
Adding lock_dir.
mahyarsamani Feb 28, 2022
eb63831
Debugging
marjanfariborz Feb 28, 2022
4d137d8
More debugging.
mahyarsamani Feb 28, 2022
efcbae8
Fixed the bugs. Simulation is an endless loop.
mahyarsamani Mar 1, 2022
f0dadbb
Debugged: Releases the address when the memory is blocked.
marjanfariborz Mar 1, 2022
b1a5999
Adding coalescer to the code.
mahyarsamani Mar 22, 2022
4cc59dc
Finalizing source code. Before compile.
marjanfariborz Mar 22, 2022
965a48e
Compiles.
marjanfariborz Mar 23, 2022
df5706a
Debugging after compilation. Loop writting to mem
mahyarsamani Mar 23, 2022
ca2f069
Correctness tested with small graph.
mahyarsamani Mar 23, 2022
358c8e6
Added performance statistics.
marjanfariborz Mar 23, 2022
c6ae6a6
Updating definitions for structs and removing unnecessary funcs.
mahyarsamani Mar 31, 2022
aa5a5e0
Fixing base_edge_addr in config and debugs.
mahyarsamani Apr 1, 2022
b8df760
Changing queue to deque
marjanfariborz Apr 1, 2022
2bfc6c7
Removing old files and renaming utils to data_structs.
mahyarsamani Apr 1, 2022
2d18a7b
Fixing bugs.
mahyarsamani Apr 1, 2022
cf001ea
Updating createUpdatePacket.
mahyarsamani Apr 3, 2022
c405e30
Adding retry to wle respPort and debug.
mahyarsamani Apr 4, 2022
f435646
Debugging coalesce engine deadlock.
mahyarsamani Apr 5, 2022
8195339
Restructing inheritance and fixiing inf queue.
mahyarsamani Apr 7, 2022
02f7baf
Fixing one scheduling error in events.
mahyarsamani Apr 8, 2022
4f58d86
Works!!!!!!
mahyarsamani Apr 10, 2022
b920f15
Removing SystemXBar from config script. [has-bug]
mahyarsamani Apr 12, 2022
58e3b63
Fixing the bug when deallocating a taken line.
mahyarsamani Apr 13, 2022
6e7cb50
Parameterizing cache_size and memory_atom_size.
mahyarsamani Apr 13, 2022
c216819
Renaming BaseReadEngine to BaseMemEngine.
mahyarsamani Apr 13, 2022
293cb52
Adding a new SConscript for src/accl.
mahyarsamani Apr 13, 2022
5df2ae2
Fixing stats and adding a few new ones.
mahyarsamani Apr 13, 2022
4e169aa
Fixing memory atom size issue.
mahyarsamani Apr 15, 2022
7f52d64
Removing dead code.
mahyarsamani Apr 17, 2022
2ca8a98
[WIP] added the central control unit.
marjanfariborz Apr 19, 2022
a95da7b
Adding UpdateWL as a MemCmd and fixing code.
mahyarsamani Apr 22, 2022
e4b665c
A little bit of debugging and updating config script.
mahyarsamani Apr 25, 2022
c8b7b26
Adding initState to CenteralController.
mahyarsamani Apr 25, 2022
f0bf614
Changing debug flag for CenteralController.
mahyarsamani Apr 29, 2022
4485e3b
Fixing a bug and adding new stats.
mahyarsamani May 3, 2022
c17fb8b
Fixing double evicts.
mahyarsamani May 17, 2022
4c8ebec
Fixing false dependency and deadlock issues. wip.
mahyarsamani May 19, 2022
7e7f09d
Decoupling apply and evict. Done.
mahyarsamani May 19, 2022
550a9fe
Fixed miss-deallocation bug. Hopefully.
mahyarsamani May 20, 2022
929aab1
Correctness passed with finite push queue and facebook graph.
mahyarsamani May 22, 2022
e16c0de
Fixing an incorrect assertion.
mahyarsamani May 23, 2022
83af4b3
Converting apply and evict queues to FIFOSet.
mahyarsamani Jun 3, 2022
e9c4b2e
Moving delete pkt in push_engine.cc.
mahyarsamani Jun 13, 2022
a07fba2
Enforced limited length on memRespQueue in PushEngine.
mahyarsamani Jun 19, 2022
dd056de
Adding bit vector implementation for caching push meta data.
mahyarsamani Jul 8, 2022
7a35185
Completing retry between coalesce and push engine.
mahyarsamani Jul 17, 2022
2b9604d
Updating variable names and debug flags.
mahyarsamani Jul 19, 2022
86a72bc
Somewhat fixing the correctness.
mahyarsamani Jul 19, 2022
9f4c1f3
Almost fixed retry bugs. 14 wrong vertices in lj.
mahyarsamani Jul 20, 2022
e54f3c1
Deleting comments and updating config.
mahyarsamani Jul 20, 2022
5a27472
Adding a new debug print.
mahyarsamani Jul 20, 2022
590c8a8
Updating debug flags. Adding one per comp.
mahyarsamani Jul 20, 2022
be1246d
Removing accidentally commented out wrong code.
mahyarsamani Jul 20, 2022
c9458f1
Adding in between counter for retry.
mahyarsamani Jul 21, 2022
cb31698
Fixing the retry mechanism.
mahyarsamani Jul 22, 2022
c03a23a
Limiting retries to one.
mahyarsamani Jul 23, 2022
dcfaab3
Adding MemoryEvent class and nextReadOnMissEvent.
mahyarsamani Jul 24, 2022
7db47e2
Restructuring events and adding nextWriteBackEvent.
mahyarsamani Jul 24, 2022
e0f5242
Implemented MemoryEvent retry mechanism.
mahyarsamani Jul 24, 2022
42ff3b8
Adding DPRINTF for structure sizes.
mahyarsamani Jul 25, 2022
5f51383
Updating config script for sega.
mahyarsamani Jul 25, 2022
ed206a8
Adding more assertion for MSHR and fillQueue.
marjanfariborz Jul 25, 2022
cdfd981
Adding debug flags for responseQueue size.
marjanfariborz Jul 25, 2022
4a466ae
Adding assertions to test the size of queues in coalesce engine.
marjanfariborz Jul 25, 2022
4871152
Checking the size of queues in PushEngine and WLEngine
marjanfariborz Jul 25, 2022
29ae1de
Making CoalesceEngine a BaseMemoryEngine.
mahyarsamani Jul 25, 2022
bbc7e3a
Fixing cache mapping issue.
mahyarsamani Jul 25, 2022
6c9e7c8
Refactoring PushEngine to inherit from BaseMemoryEngine.
mahyarsamani Jul 26, 2022
b7e76bf
Refactored PushEngine to inherit from BaseMemoryEngine.
mahyarsamani Jul 26, 2022
0fc5c5e
Making bit vector smaller and choosing slices faster.
mahyarsamani Jul 26, 2022
ef61dcf
Merging all memory interactions into one event.
mahyarsamani Jul 28, 2022
d00c610
Adding more dprintfs.
mahyarsamani Jul 29, 2022
08ca0a1
Fixing cache block state machine. wip.
mahyarsamani Jul 29, 2022
2b2b27c
Fixing cache block state machine. cont. wip
mahyarsamani Jul 31, 2022
f138726
Completed cache block state machine. Needs rework of push interface.
mahyarsamani Jul 31, 2022
4138a24
Fixing scheduling error of memory functions.
mahyarsamani Aug 3, 2022
1194dc3
Fixing incorrect assert.
mahyarsamani Aug 3, 2022
c1d92ae
Updating memory address mapping and interface for push coalesce.
mahyarsamani Aug 5, 2022
371f2b6
Implemented pullVertex.
mahyarsamani Aug 12, 2022
34d8bce
Added sim exit functionality. WIP
mahyarsamani Aug 22, 2022
72cdfa6
Adding a DDR model to the accelerator
marjanfariborz Aug 26, 2022
6d0c401
Completed sim exit. I think...
mahyarsamani Aug 29, 2022
86b82a7
Minor improvements in the code.
mahyarsamani Sep 2, 2022
8bbe1cd
Added HBM as vertex memory. It doesn't exit!
marjanfariborz Sep 2, 2022
25ded8a
Adding Real memory for EM
marjanfariborz Sep 2, 2022
0f69be2
Fixing style.
mahyarsamani Sep 2, 2022
16bb60f
Khoshgelation.
mahyarsamani Sep 2, 2022
99f997f
Adding new stats.
mahyarsamani Sep 2, 2022
c8a4614
Fixing asserion error on busyMask.
mahyarsamani Sep 5, 2022
9ad5fa2
Fixing finding work in coalesce engine.
marjanfariborz Sep 5, 2022
d57d301
Fixing choosing work in coalesce engine.
mahyarsamani Sep 6, 2022
8d4f9b0
Adding support for synthetic traffic
marjanfariborz Jul 28, 2022
7ddb4cf
Adding workload as a parameter
marjanfariborz Jul 28, 2022
302bc6e
Adding workload as a parameter to coalesce engine.
mahyarsamani Sep 7, 2022
ab2362a
Adding stats.
mahyarsamani Sep 8, 2022
40b01f0
Separating graph generation from run script.
mahyarsamani Sep 11, 2022
6124b00
Adding new stats.
mahyarsamani Sep 12, 2022
6559023
Fixing sconscript style.
mahyarsamani Sep 14, 2022
489e914
Adding stats for measuring push and pull rate.
mahyarsamani Sep 15, 2022
b297c79
Added FinalAnswer debugFlag and answer printing.
mahyarsamani Sep 16, 2022
16216bc
Adding stats to measure vertexReadLatency.
mahyarsamani Sep 19, 2022
3e6216c
Adding a config script with simple memory
mahyarsamani Sep 19, 2022
e1d8a93
Adding stats to count the result of bitvector search.
marjanfariborz Sep 20, 2022
a0a0fbe
Adding a stat to count number of idle cycles.
mahyarsamani Sep 22, 2022
efcc6d2
Adding stats to measure queueing latencies.
mahyarsamani Sep 23, 2022
baa1dcb
Added pybindmethod to createInitialUpdate. merge added.
mahyarsamani Sep 26, 2022
a0461de
Adding stat to measure response latency.
mahyarsamani Sep 26, 2022
fbbd888
Adding stats to count model inaccuracies.
mahyarsamani Sep 27, 2022
411bfa1
style fix.
mahyarsamani Sep 29, 2022
bf9bed1
Adding multiple queues and ports in pushEngine
marjanfariborz Sep 28, 2022
32c7581
Changing propagate function
marjanfariborz Sep 28, 2022
666ab3d
Pushing on Marjan's behalf, refactored out_port to vector-port.
mahyarsamani Sep 29, 2022
194a5e4
Attempting to add multi-inports to MPU
marjanfariborz Sep 30, 2022
cddd042
Moving reqPorts from MPU to PushEngine
marjanfariborz Oct 3, 2022
d2e6f2e
Moving respPorts from MPU to WLEngine
marjanfariborz Oct 3, 2022
07cfd5f
Updating dprintfs.
mahyarsamani Oct 3, 2022
bab798d
Fixing the problems with retry
marjanfariborz Oct 4, 2022
6140135
Fixing done, code style and conifg. Adding a stat.
mahyarsamani Oct 4, 2022
4b555f6
Back indent.
mahyarsamani Oct 6, 2022
fe68447
Fixed HBM range issue.
mahyarsamani Oct 7, 2022
d30ddb5
Refactoring reading edges from memory
marjanfariborz Oct 7, 2022
7a6ab86
Added statistics to calculate number of propagates sent
marjanfariborz Oct 7, 2022
0bd83b6
Adding coalescing to pushEngine
marjanfariborz Oct 8, 2022
9f052dc
Adding function to print final answer.
mahyarsamani Oct 9, 2022
cc19d17
Typos.
mahyarsamani Oct 10, 2022
76407f7
Adding functions to move value to and from float.
mahyarsamani Oct 11, 2022
6413163
Adding sssp and pr.
marjanfariborz Oct 11, 2022
bdb4275
making workload appropriate inits
marjanfariborz Oct 12, 2022
5fa0c4c
wip for implementing prewB and prePush apply functions.
mahyarsamani Oct 12, 2022
2e1719a
Adding GraphWorkload class.
marjanfariborz Oct 14, 2022
fba3e57
Cleaning up.
mahyarsamani Oct 15, 2022
01ab8f8
Implementing post push wb buffer.
mahyarsamani Oct 17, 2022
932aec6
Implementing correction function for PushEngine.
mahyarsamani Oct 17, 2022
60ea8db
Adding initialization to graphWorkloads
marjanfariborz Oct 19, 2022
9b91fb7
Fixing algo start issue.
marjanfariborz Oct 22, 2022
d4644ce
Fixing block addr initialization.
mahyarsamani Oct 22, 2022
e2f68af
Adding PR.
mahyarsamani Oct 24, 2022
bb31571
Prepping for PR.
mahyarsamani Oct 24, 2022
9c1f57e
Adding print function to GraphWorkload class.
mahyarsamani Oct 25, 2022
95c676b
Updating PR
marjanfariborz Oct 25, 2022
166c3ac
Updating configs for pr and bfs. Fixing bugs for pr.
mahyarsamani Oct 26, 2022
ffbef8e
Fixing typos.
mahyarsamani Oct 26, 2022
fe14605
Adding sample script.
mahyarsamani Oct 27, 2022
151a02f
Fixing sim performance issue.
mahyarsamani Oct 28, 2022
82d076c
Fixing write miss issue.
mahyarsamani Oct 31, 2022
f217715
Restructuring the cache.
mahyarsamani Nov 1, 2022
80b3803
First working and tested version of workdirectory.
mahyarsamani Nov 7, 2022
c4fc96e
Adding new stats.
mahyarsamani Nov 8, 2022
b68602b
Adding state.
mahyarsamani Nov 8, 2022
ec5025f
Adding stat to count number of conflict misses.
mahyarsamani Nov 8, 2022
ca97113
Adding stat to count the number of update rolls.
mahyarsamani Nov 8, 2022
fd1561f
Removing unnecessary comments.
mahyarsamani Nov 9, 2022
1124f5b
Removing comments.
mahyarsamani Nov 9, 2022
c2b08a6
Adding pr and updating config scripts.
mahyarsamani Nov 9, 2022
ccaa539
Updating activeCondition for PR.
mahyarsamani Nov 10, 2022
3747d9f
Adding SSSP and CC
marjanfariborz Nov 13, 2022
000103e
Adding option to use SimpleMemory for vertex memory.
mahyarsamani Nov 11, 2022
4b30d61
Removing graph gen scripts and moved to sega-utils.
mahyarsamani Nov 12, 2022
e10ce61
Adding BSP mode.
mahyarsamani Nov 12, 2022
454e1e3
Fixing enums
mahyarsamani Nov 12, 2022
f4b8685
Further fixes for enums.
mahyarsamani Nov 12, 2022
c3fd132
Fixing typos
mahyarsamani Nov 12, 2022
513e3f6
Fixing typos.
mahyarsamani Nov 12, 2022
d9ae6be
Fixing typos.
mahyarsamani Nov 12, 2022
37ec3dd
Debug.
mahyarsamani Nov 12, 2022
4abd1cd
Debugging.
mahyarsamani Nov 12, 2022
32a0f81
Typos.
mahyarsamani Nov 12, 2022
1352e20
Debugging.
mahyarsamani Nov 12, 2022
f13057c
Finalizing bsp and pr.
mahyarsamani Nov 13, 2022
f59afb8
Fixing a bug in async mode.
mahyarsamani Nov 13, 2022
7727950
Debugging and removing typos. sega-ddr represent correct system config.
mahyarsamani Nov 14, 2022
93624cc
Debugging, finalizing the config and merging new workloads.
mahyarsamani Nov 14, 2022
aee9d09
Fixing port proxy bug of limiting size to int.
mahyarsamani Nov 14, 2022
eb22da3
Fixing postConsumeProcess.
mahyarsamani Nov 14, 2022
1acdbb4
Addding BC.
mahyarsamani Nov 15, 2022
c6af36c
Adding BC and degbugging.
mahyarsamani Nov 15, 2022
787f7f4
Fixing BC run script.
mahyarsamani Nov 15, 2022
b13d005
Fixing dirty issue in bsp.
mahyarsamani Nov 17, 2022
7861b6a
Adding Async PR.
mahyarsamani Nov 18, 2022
a991328
Fixing typos.
mahyarsamani Nov 18, 2022
da4decf
Fixing init in asyncPR.
marjanfariborz Feb 7, 2023
7256874
Improving UniqueFIFO implementation.
mahyarsamani Mar 9, 2023
8673a9d
Adding asynchronous temporal partitioning
marjanfariborz Mar 9, 2023
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125 changes: 125 additions & 0 deletions configs/accl/async-pr.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,125 @@
# Copyright (c) 2022 The Regents of the University of California
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


import m5
import argparse

from m5.objects import *


def get_inputs():
argparser = argparse.ArgumentParser()
argparser.add_argument("num_gpts", type=int)
argparser.add_argument("num_registers", type=int)
argparser.add_argument("cache_size", type=str)
argparser.add_argument("graph", type=str)
argparser.add_argument("alpha", type=float)
argparser.add_argument("threshold", type=float)
argparser.add_argument(
"--simple",
dest="simple",
action="store_const",
const=True,
default=False,
help="Use simple memory for vertex",
)
argparser.add_argument(
"--sample",
dest="sample",
action="store_const",
const=True,
default=False,
help="Sample sim stats every 100us",
)
argparser.add_argument(
"--verify",
dest="verify",
action="store_const",
const=True,
default=False,
help="Print final answer",
)

args = argparser.parse_args()

return (
args.num_gpts,
args.num_registers,
args.cache_size,
args.graph,
args.alpha,
args.threshold,
args.simple,
args.sample,
args.verify,
)


if __name__ == "__m5_main__":
(
num_gpts,
num_registers,
cache_size,
graph,
alpha,
threshold,
simple,
sample,
verify,
) = get_inputs()

if simple:
from sega_simple import SEGA
else:
from sega import SEGA
system = SEGA(num_gpts, num_registers, cache_size, graph)
root = Root(full_system=False, system=system)

m5.instantiate()

system.set_async_mode()
system.create_pop_count_directory(64)
system.create_async_pr_workload(alpha, threshold)
if sample:
while True:
exit_event = m5.simulate(100000000)
print(
f"Exited simulation at tick {m5.curTick()} "
+ f"because {exit_event.getCause()}"
)
m5.stats.dump()
m5.stats.reset()
if exit_event.getCause() != "simulate() limit reached":
break
else:
exit_event = m5.simulate()
print(
f"Exited simulation at tick {m5.curTick()} "
+ f"because {exit_event.getCause()}"
)
if verify:
system.print_answer()
131 changes: 131 additions & 0 deletions configs/accl/bc.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,131 @@
# Copyright (c) 2022 The Regents of the University of California
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


import m5
import argparse

from m5.objects import *


def get_inputs():
argparser = argparse.ArgumentParser()
argparser.add_argument("num_gpts", type=int)
argparser.add_argument("num_registers", type=int)
argparser.add_argument("cache_size", type=str)
argparser.add_argument("graph", type=str)
argparser.add_argument("init_addr", type=int)
argparser.add_argument("init_value", type=int)
argparser.add_argument(
"--simple",
dest="simple",
action="store_const",
const=True,
default=False,
help="Use simple memory for vertex",
)
argparser.add_argument(
"--sample",
dest="sample",
action="store_const",
const=True,
default=False,
help="Sample sim stats every 100us",
)
argparser.add_argument(
"--verify",
dest="verify",
action="store_const",
const=True,
default=False,
help="Print final answer",
)

args = argparser.parse_args()

return (
args.num_gpts,
args.num_registers,
args.cache_size,
args.graph,
args.init_addr,
args.init_value,
args.simple,
args.sample,
args.verify,
)


if __name__ == "__m5_main__":
(
num_gpts,
num_registers,
cache_size,
graph,
init_addr,
init_value,
simple,
sample,
verify,
) = get_inputs()

if simple:
from sega_simple import SEGA
else:
from sega import SEGA
system = SEGA(num_gpts, num_registers, cache_size, graph)
root = Root(full_system=False, system=system)

m5.instantiate()

system.set_bsp_mode()
system.create_pop_count_directory(64)
system.create_bc_workload(init_addr, init_value)
if sample:
while True:
exit_event = m5.simulate(100000000)
print(
f"Exited simulation at tick {m5.curTick()} "
+ f"because {exit_event.getCause()}"
)
m5.stats.dump()
m5.stats.reset()
if exit_event.getCause() != "simulate() limit reached":
break
else:
iterations = 0
while True:
exit_event = m5.simulate()
print(
f"Exited simulation at tick {m5.curTick()} "
+ f"because {exit_event.getCause()}"
)
iterations += 1
if system.work_count() == 0:
break
print(f"#iterations: {iterations}")
if verify:
system.print_answer()
138 changes: 138 additions & 0 deletions configs/accl/bfs.py
Original file line number Diff line number Diff line change
@@ -0,0 +1,138 @@
# Copyright (c) 2022 The Regents of the University of California
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.


import m5
import argparse

from m5.objects import *


def get_inputs():
argparser = argparse.ArgumentParser()
argparser.add_argument("num_gpts", type=int)
argparser.add_argument("num_registers", type=int)
argparser.add_argument("cache_size", type=str)
argparser.add_argument("graph", type=str)
argparser.add_argument("init_addr", type=int)
argparser.add_argument("init_value", type=int)
argparser.add_argument(
"--visited",
dest="visited",
action="store_const",
const=True,
default=False,
help="Use visitation version of BFS",
)
argparser.add_argument(
"--simple",
dest="simple",
action="store_const",
const=True,
default=False,
help="Use simple memory for vertex",
)
argparser.add_argument(
"--sample",
dest="sample",
action="store_const",
const=True,
default=False,
help="Sample sim stats every 100us",
)
argparser.add_argument(
"--verify",
dest="verify",
action="store_const",
const=True,
default=False,
help="Print final answer",
)

args = argparser.parse_args()

return (
args.num_gpts,
args.num_registers,
args.cache_size,
args.graph,
args.init_addr,
args.init_value,
args.visited,
args.simple,
args.sample,
args.verify,
)


if __name__ == "__m5_main__":
(
num_gpts,
num_registers,
cache_size,
graph,
init_addr,
init_value,
visited,
simple,
sample,
verify,
) = get_inputs()

if simple:
from sega_simple import SEGA
else:
from sega import SEGA
system = SEGA(num_gpts, num_registers, cache_size, graph)
root = Root(full_system=False, system=system)

m5.instantiate()

system.set_async_mode()
system.create_pop_count_directory(64)
if visited:
system.create_bfs_visited_workload(init_addr, init_value)
else:
system.create_bfs_workload(init_addr, init_value)
if sample:
while True:
exit_event = m5.simulate(100000000)
print(
f"Exited simulation at tick {m5.curTick()} "
+ f"because {exit_event.getCause()}"
)
m5.stats.dump()
m5.stats.reset()
if exit_event.getCause() != "simulate() limit reached":
break
else:
exit_event = m5.simulate()
print(
f"Exited simulation at tick {m5.curTick()} "
+ f"because {exit_event.getCause()}"
)
if verify:
system.print_answer()
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