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I ran the cl_sde testbench (mainly h2c) and observed that the write performance is approximately 1 GB/s, which I believe matches the result in the software demo.
Now, I’d like to simulate my logic under the condition of having more than one descriptor, so I can evaluate whether it is suitable for high-performance scenarios.
My question is: how should I modify test_simple_h2c.sv to enable simulation with more than one descriptor?