diff --git a/hal/Cargo.toml b/hal/Cargo.toml
index 0b85f67d57c4..c2f3586210c6 100644
--- a/hal/Cargo.toml
+++ b/hal/Cargo.toml
@@ -37,8 +37,7 @@ bitflags = "2.6.0"
 cipher = "0.3"
 critical-section = "1.2.0"
 cortex-m = "0.7"
-embedded-hal-02 = {package = "embedded-hal", version = "0.2", features = ["unproven"]}
-embedded-hal-1 = {package = "embedded-hal", version = "1.0.0"}
+embedded-hal = "1.0.0"
 embedded-hal-nb = "1.0.0"
 embedded-io = "0.6"
 fugit = "0.3"
diff --git a/hal/src/delay.rs b/hal/src/delay.rs
index 3ea6aa60bc8a..134d6e57e343 100644
--- a/hal/src/delay.rs
+++ b/hal/src/delay.rs
@@ -6,7 +6,6 @@ use cortex_m::peripheral::syst::SystClkSource;
 
 use crate::clock::GenericClockController;
 use crate::ehal::delay::DelayNs;
-use crate::ehal_02;
 use crate::time::Hertz;
 
 #[hal_cfg("rtc-d5x")]
@@ -94,39 +93,3 @@ impl DelayNs for Delay {
         self.delay_us(ms * 1000);
     }
 }
-
-impl ehal_02::blocking::delay::DelayMs<u32> for Delay {
-    fn delay_ms(&mut self, ms: u32) {
-        <Self as DelayNs>::delay_us(self, ms * 1_000);
-    }
-}
-
-impl ehal_02::blocking::delay::DelayMs<u16> for Delay {
-    fn delay_ms(&mut self, ms: u16) {
-        <Self as ehal_02::blocking::delay::DelayMs<u32>>::delay_ms(self, ms as u32);
-    }
-}
-
-impl ehal_02::blocking::delay::DelayMs<u8> for Delay {
-    fn delay_ms(&mut self, ms: u8) {
-        <Self as ehal_02::blocking::delay::DelayMs<u32>>::delay_ms(self, ms as u32);
-    }
-}
-
-impl ehal_02::blocking::delay::DelayUs<u32> for Delay {
-    fn delay_us(&mut self, us: u32) {
-        <Self as DelayNs>::delay_us(self, us);
-    }
-}
-
-impl ehal_02::blocking::delay::DelayUs<u16> for Delay {
-    fn delay_us(&mut self, us: u16) {
-        <Self as ehal_02::blocking::delay::DelayUs<u32>>::delay_us(self, us as u32);
-    }
-}
-
-impl ehal_02::blocking::delay::DelayUs<u8> for Delay {
-    fn delay_us(&mut self, us: u8) {
-        <Self as ehal_02::blocking::delay::DelayUs<u32>>::delay_us(self, us as u32);
-    }
-}
diff --git a/hal/src/gpio/dynpin.rs b/hal/src/gpio/dynpin.rs
index 913193b81e3a..11702ba3ca54 100644
--- a/hal/src/gpio/dynpin.rs
+++ b/hal/src/gpio/dynpin.rs
@@ -550,50 +550,3 @@ impl StatefulOutputPin for DynPin {
         self._is_set_low()
     }
 }
-
-//==============================================================================
-// Embedded HAL v0.2 traits
-//==============================================================================
-
-impl crate::ehal_02::digital::v2::OutputPin for DynPin {
-    type Error = Error;
-    #[inline]
-    fn set_high(&mut self) -> Result<(), Self::Error> {
-        self._set_high()
-    }
-    #[inline]
-    fn set_low(&mut self) -> Result<(), Self::Error> {
-        self._set_low()
-    }
-}
-
-impl crate::ehal_02::digital::v2::InputPin for DynPin {
-    type Error = Error;
-    #[inline]
-    fn is_high(&self) -> Result<bool, Self::Error> {
-        self._is_high()
-    }
-    #[inline]
-    fn is_low(&self) -> Result<bool, Self::Error> {
-        self._is_low()
-    }
-}
-
-impl crate::ehal_02::digital::v2::ToggleableOutputPin for DynPin {
-    type Error = Error;
-    #[inline]
-    fn toggle(&mut self) -> Result<(), Self::Error> {
-        self._toggle()
-    }
-}
-
-impl crate::ehal_02::digital::v2::StatefulOutputPin for DynPin {
-    #[inline]
-    fn is_set_high(&self) -> Result<bool, Self::Error> {
-        self._is_set_high()
-    }
-    #[inline]
-    fn is_set_low(&self) -> Result<bool, Self::Error> {
-        self._is_set_low()
-    }
-}
diff --git a/hal/src/gpio/pin.rs b/hal/src/gpio/pin.rs
index a48984fee525..c58441f5ed10 100644
--- a/hal/src/gpio/pin.rs
+++ b/hal/src/gpio/pin.rs
@@ -969,103 +969,6 @@ where
     }
 }
 
-//==============================================================================
-//  Embedded HAL v0.2 traits
-//==============================================================================
-
-impl<I, C> crate::ehal_02::digital::v2::OutputPin for Pin<I, Output<C>>
-where
-    I: PinId,
-    C: OutputConfig,
-{
-    type Error = Infallible;
-    #[inline]
-    fn set_high(&mut self) -> Result<(), Self::Error> {
-        self._set_high();
-        Ok(())
-    }
-    #[inline]
-    fn set_low(&mut self) -> Result<(), Self::Error> {
-        self._set_low();
-        Ok(())
-    }
-}
-
-impl<I> crate::ehal_02::digital::v2::InputPin for Pin<I, ReadableOutput>
-where
-    I: PinId,
-{
-    type Error = Infallible;
-    #[inline]
-    fn is_high(&self) -> Result<bool, Self::Error> {
-        Ok(self._is_high())
-    }
-    #[inline]
-    fn is_low(&self) -> Result<bool, Self::Error> {
-        Ok(self._is_low())
-    }
-}
-
-impl<I, C> crate::ehal_02::digital::v2::InputPin for Pin<I, Input<C>>
-where
-    I: PinId,
-    C: InputConfig,
-{
-    type Error = Infallible;
-    #[inline]
-    fn is_high(&self) -> Result<bool, Self::Error> {
-        Ok(self._is_high())
-    }
-    #[inline]
-    fn is_low(&self) -> Result<bool, Self::Error> {
-        Ok(self._is_low())
-    }
-}
-
-impl<I, C> crate::ehal_02::digital::v2::InputPin for Pin<I, Interrupt<C>>
-where
-    I: PinId,
-    C: InterruptConfig,
-{
-    type Error = Infallible;
-    #[inline]
-    fn is_high(&self) -> Result<bool, Self::Error> {
-        Ok(self._is_high())
-    }
-    #[inline]
-    fn is_low(&self) -> Result<bool, Self::Error> {
-        Ok(self._is_low())
-    }
-}
-
-impl<I, C> crate::ehal_02::digital::v2::ToggleableOutputPin for Pin<I, Output<C>>
-where
-    I: PinId,
-    C: OutputConfig,
-{
-    type Error = Infallible;
-    #[inline]
-    fn toggle(&mut self) -> Result<(), Self::Error> {
-        self._toggle();
-        Ok(())
-    }
-}
-
-impl<I, C> crate::ehal_02::digital::v2::StatefulOutputPin for Pin<I, Output<C>>
-where
-    I: PinId,
-    C: OutputConfig,
-{
-    #[inline]
-    fn is_set_high(&self) -> Result<bool, Self::Error> {
-        Ok(self._is_set_high())
-    }
-    #[inline]
-    fn is_set_low(&self) -> Result<bool, Self::Error> {
-        Ok(self._is_set_low())
-    }
-}
-
 //==============================================================================
 //  Pin definitions
 //==============================================================================
diff --git a/hal/src/lib.rs b/hal/src/lib.rs
index e20f6b5025d1..c92b6524d0aa 100644
--- a/hal/src/lib.rs
+++ b/hal/src/lib.rs
@@ -1,7 +1,6 @@
 #![no_std]
 
-pub use embedded_hal_1 as ehal;
-use embedded_hal_02 as ehal_02;
+pub use embedded_hal as ehal;
 pub use embedded_hal_nb as ehal_nb;
 pub use embedded_io;
 pub use fugit;
diff --git a/hal/src/peripherals/eic/d11/pin.rs b/hal/src/peripherals/eic/d11/pin.rs
index 1d78ef102a60..637401f42c8f 100644
--- a/hal/src/peripherals/eic/d11/pin.rs
+++ b/hal/src/peripherals/eic/d11/pin.rs
@@ -1,11 +1,8 @@
 use atsamd_hal_macros::hal_cfg;
 
 use crate::ehal::digital::{ErrorType, InputPin};
-use crate::ehal_02::digital::v2::InputPin as InputPin_02;
 use crate::eic::*;
-use crate::gpio::{
-    self, pin::*, AnyPin, FloatingInterrupt, PinMode, PullDownInterrupt, PullUpInterrupt,
-};
+use crate::gpio::{self, FloatingInterrupt, PinMode, PullDownInterrupt, PullUpInterrupt};
 use core::convert::Infallible;
 
 /// The pad macro defines the given EIC pin and implements EicPin for the
@@ -142,23 +139,6 @@ where
     }
 }
 
-impl<P, C, Id, F> InputPin_02 for ExtInt<P, Id, F>
-where
-    P: EicPin + AnyPin<Mode = Interrupt<C>>,
-    Id: ChId,
-    C: InterruptConfig,
-{
-    type Error = Infallible;
-    #[inline]
-    fn is_high(&self) -> Result<bool, Self::Error> {
-        self.pin.is_high()
-    }
-    #[inline]
-    fn is_low(&self) -> Result<bool, Self::Error> {
-        self.pin.is_low()
-    }
-}
-
 impl<P, Id, F> InputPin for ExtInt<P, Id, F>
 where
     Self: ErrorType,
diff --git a/hal/src/peripherals/eic/d5x/pin.rs b/hal/src/peripherals/eic/d5x/pin.rs
index 2dd2bdac72f7..b1816b2fd5c2 100644
--- a/hal/src/peripherals/eic/d5x/pin.rs
+++ b/hal/src/peripherals/eic/d5x/pin.rs
@@ -1,11 +1,8 @@
 use atsamd_hal_macros::hal_cfg;
 
 use crate::ehal::digital::{ErrorType, InputPin};
-use crate::ehal_02::digital::v2::InputPin as InputPin_02;
 use crate::eic::*;
-use crate::gpio::{
-    self, pin::*, AnyPin, FloatingInterrupt, PinMode, PullDownInterrupt, PullUpInterrupt,
-};
+use crate::gpio::{self, FloatingInterrupt, PinMode, PullDownInterrupt, PullUpInterrupt};
 use core::convert::Infallible;
 
 /// The pad macro defines the given EIC pin and implements EicPin for the
@@ -162,23 +159,6 @@ where
     }
 }
 
-impl<P, C, Id, F> InputPin_02 for ExtInt<P, Id, F>
-where
-    P: EicPin + AnyPin<Mode = Interrupt<C>>,
-    C: InterruptConfig,
-    Id: ChId,
-{
-    type Error = Infallible;
-    #[inline]
-    fn is_high(&self) -> Result<bool, Self::Error> {
-        self.pin.is_high()
-    }
-    #[inline]
-    fn is_low(&self) -> Result<bool, Self::Error> {
-        self.pin.is_low()
-    }
-}
-
 impl<P, Id, F> InputPin for ExtInt<P, Id, F>
 where
     Self: ErrorType,
diff --git a/hal/src/peripherals/pwm/d11.rs b/hal/src/peripherals/pwm/d11.rs
index d807f1fcb4d0..a04a2ad07c2f 100644
--- a/hal/src/peripherals/pwm/d11.rs
+++ b/hal/src/peripherals/pwm/d11.rs
@@ -87,55 +87,41 @@ impl $TYPE {
         let top = count.cc(0).read().cc().bits();
         self.clock_freq / divisor as u32 / (top + 1) as u32
     }
-}
-
-impl $crate::ehal::pwm::ErrorType for$TYPE {
-    type Error = ::core::convert::Infallible;
-}
 
-impl $crate::ehal::pwm::SetDutyCycle for $TYPE {
-    fn max_duty_cycle(&self) -> u16 {
-        let count = self.tc.count16();
-        let top = count.cc(0).read().cc().bits();
-        top
-    }
-
-    fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
-        let count = self.tc.count16();
-        unsafe { count.cc(1).write(|w| w.cc().bits(duty)); }
-        Ok(())
-    }
-}
-
-impl $crate::ehal_02::PwmPin for $TYPE {
-    type Duty = u16;
-
-    fn disable(&mut self) {
+    pub fn disable(&mut self) {
         let count = self.tc.count16();
         count.ctrla().modify(|_, w| w.enable().clear_bit());
         while count.status().read().syncbusy().bit_is_set() {}
     }
 
-    fn enable(&mut self) {
+    pub fn enable(&mut self) {
         let count = self.tc.count16();
         count.ctrla().modify(|_, w| w.enable().set_bit());
         while count.status().read().syncbusy().bit_is_set() {}
     }
 
-    fn get_duty(&self) -> Self::Duty {
+    pub fn get_duty(&self) -> u16 {
         let count = self.tc.count16();
         let duty: u16 = count.cc(1).read().cc().bits();
         duty
     }
+}
 
-    fn get_max_duty(&self) -> Self::Duty {
-        use $crate::ehal::pwm::SetDutyCycle;
-        self.max_duty_cycle()
+impl $crate::ehal::pwm::ErrorType for$TYPE {
+    type Error = ::core::convert::Infallible;
+}
+
+impl $crate::ehal::pwm::SetDutyCycle for $TYPE {
+    fn max_duty_cycle(&self) -> u16 {
+        let count = self.tc.count16();
+        let top = count.cc(0).read().cc().bits();
+        top
     }
 
-    fn set_duty(&mut self, duty: Self::Duty) {
-        use $crate::ehal::pwm::SetDutyCycle;
-        let _ignore_infaillible = self.set_duty_cycle(duty);
+    fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
+        let count = self.tc.count16();
+        unsafe { count.cc(1).write(|w| w.cc().bits(duty)); }
+        Ok(())
     }
 }
 
@@ -221,48 +207,42 @@ impl $TYPE {
             tcc,
         }
     }
-}
 
-impl $crate::ehal_02::Pwm for $TYPE {
-    type Channel = Channel;
-    type Time = Hertz;
-    type Duty = u32;
-
-    fn disable(&mut self, _channel: Self::Channel) {
+    pub fn disable(&mut self, _channel: Channel) {
         self.tcc.ctrla().modify(|_, w| w.enable().clear_bit());
         while self.tcc.syncbusy().read().enable().bit_is_set() {}
     }
 
-    fn enable(&mut self, _channel: Self::Channel) {
+    pub fn enable(&mut self, _channel: Channel) {
         self.tcc.ctrla().modify(|_, w| w.enable().set_bit());
         while self.tcc.syncbusy().read().enable().bit_is_set() {}
     }
 
-    fn get_period(&self) -> Self::Time {
+    pub fn get_period(&self) -> Hertz {
         let divisor = self.tcc.ctrla().read().prescaler().bits();
         let top = self.tcc.per().read().bits();
         self.clock_freq / divisor as u32 / (top + 1) as u32
     }
 
-    fn get_duty(&self, channel: Self::Channel) -> Self::Duty {
+    pub fn get_duty(&self, channel: Channel) -> u32 {
         let cc = self.tcc.cc(channel as usize);
         let duty: u32 = cc.read().cc().bits();
         duty
     }
 
-    fn get_max_duty(&self) -> Self::Duty {
+    pub fn get_max_duty(&self) -> u32 {
         let top = self.tcc.per().read().bits();
         top
     }
 
-    fn set_duty(&mut self, channel: Self::Channel, duty: Self::Duty) {
+    pub fn set_duty(&mut self, channel: Channel, duty: u32) {
         let cc = self.tcc.cc(channel as usize);
         cc.write(|w| unsafe { w.cc().bits(duty) });
     }
 
-    fn set_period<P>(&mut self, period: P)
+    pub fn set_period<P>(&mut self, period: P)
     where
-        P: Into<Self::Time>,
+        P: Into<Hertz>,
     {
         let period = period.into();
         let params = TimerParams::new(period, self.clock_freq);
diff --git a/hal/src/peripherals/pwm/d5x.rs b/hal/src/peripherals/pwm/d5x.rs
index 6b500ea1a6bd..7d4fe021a35a 100644
--- a/hal/src/peripherals/pwm/d5x.rs
+++ b/hal/src/peripherals/pwm/d5x.rs
@@ -217,56 +217,42 @@ impl<I: PinId> $TYPE<I> {
         count.cc(0).write(|w| unsafe { w.cc().bits(params.cycles as u16) });
         while count.syncbusy().read().cc0().bit_is_set() {}
     }
-}
-
-impl<I: PinId> $crate::ehal::pwm::ErrorType for$TYPE<I> {
-    type Error = ::core::convert::Infallible;
-}
 
-impl<I: PinId> $crate::ehal::pwm::SetDutyCycle for $TYPE<I> {
-    fn max_duty_cycle(&self) -> u16 {
-        let count = self.tc.count16();
-        let top = count.cc(0).read().cc().bits();
-        top
-    }
-
-    fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
-        let count = self.tc.count16();
-        unsafe { count.ccbuf(1).write(|w| w.ccbuf().bits(duty)); }
-        Ok(())
-    }
-}
-
-impl<I: PinId> $crate::ehal_02::PwmPin for $TYPE<I> {
-    type Duty = u16;
-
-    fn disable(&mut self) {
+    pub fn disable(&mut self) {
         let count = self.tc.count16();
         count.ctrla().modify(|_, w| w.enable().clear_bit());
         while count.syncbusy().read().enable().bit_is_set() {}
     }
 
-    fn enable(&mut self) {
+    pub fn enable(&mut self) {
         let count = self.tc.count16();
         count.ctrla().modify(|_, w| w.enable().set_bit());
         while count.syncbusy().read().enable().bit_is_set() {}
     }
 
 
-    fn get_duty(&self) -> Self::Duty {
+    pub fn get_duty(&self) -> u16 {
         let count = self.tc.count16();
         let duty: u16 = count.ccbuf(1).read().ccbuf().bits();
         duty
     }
+}
 
-    fn get_max_duty(&self) -> Self::Duty {
-        use $crate::ehal::pwm::SetDutyCycle;
-        self.max_duty_cycle()
+impl<I: PinId> $crate::ehal::pwm::ErrorType for$TYPE<I> {
+    type Error = ::core::convert::Infallible;
+}
+
+impl<I: PinId> $crate::ehal::pwm::SetDutyCycle for $TYPE<I> {
+    fn max_duty_cycle(&self) -> u16 {
+        let count = self.tc.count16();
+        let top = count.cc(0).read().cc().bits();
+        top
     }
 
-    fn set_duty(&mut self, duty: Self::Duty) {
-        use $crate::ehal::pwm::SetDutyCycle;
-        let _ignore_infaillible = self.set_duty_cycle(duty);
+    fn set_duty_cycle(&mut self, duty: u16) -> Result<(), Self::Error> {
+        let count = self.tc.count16();
+        unsafe { count.ccbuf(1).write(|w| w.ccbuf().bits(duty)); }
+        Ok(())
     }
 }
 
@@ -606,48 +592,42 @@ impl<I: PinId, M: PinMode> $TYPE<I, M> {
             pinout,
         }
     }
-}
 
-impl<I: PinId, M: PinMode> $crate::ehal_02::Pwm for $TYPE<I, M> {
-    type Channel = Channel;
-    type Time = Hertz;
-    type Duty = u32;
-
-    fn disable(&mut self, _channel: Self::Channel) {
+    pub fn disable(&mut self, _channel: Channel) {
         self.tcc.ctrla().modify(|_, w| w.enable().clear_bit());
         while self.tcc.syncbusy().read().enable().bit_is_set() {}
     }
 
-    fn enable(&mut self, _channel: Self::Channel) {
+    pub fn enable(&mut self, _channel: Channel) {
         self.tcc.ctrla().modify(|_, w| w.enable().set_bit());
         while self.tcc.syncbusy().read().enable().bit_is_set() {}
     }
 
-    fn get_period(&self) -> Self::Time {
+    pub fn get_period(&self) -> Hertz {
         let divisor = self.tcc.ctrla().read().prescaler().bits();
         let top = self.tcc.per().read().bits();
         self.clock_freq / divisor as u32 / (top + 1) as u32
     }
 
-    fn get_duty(&self, channel: Self::Channel) -> Self::Duty {
+    pub fn get_duty(&self, channel: Channel) -> u32 {
         let cc = self.tcc.cc(channel as usize);
         let duty = cc.read().cc().bits();
         duty
     }
 
-    fn get_max_duty(&self) -> Self::Duty {
+    pub fn get_max_duty(&self) -> u32 {
         let top = self.tcc.per().read().bits();
         top
     }
 
-    fn set_duty(&mut self, channel: Self::Channel, duty: Self::Duty) {
+    pub fn set_duty(&mut self, channel: Channel, duty: u32) {
         let cc = self.tcc.cc(channel as usize);
         cc.write(|w| unsafe { w.cc().bits(duty) });
     }
 
-    fn set_period<P>(&mut self, period: P)
+    pub fn set_period<P>(&mut self, period: P)
     where
-        P: Into<Self::Time>,
+        P: Into<Hertz>,
     {
         let params = TimerParams::new(period.into().convert(), self.clock_freq);
         self.tcc.ctrla().modify(|_, w| w.enable().clear_bit());
diff --git a/hal/src/peripherals/timer/common.rs b/hal/src/peripherals/timer/common.rs
index 070d8a84840d..e389424fdebb 100644
--- a/hal/src/peripherals/timer/common.rs
+++ b/hal/src/peripherals/timer/common.rs
@@ -3,8 +3,6 @@ use core::convert::Infallible;
 use fugit::NanosDurationU32;
 
 use crate::ehal::delay::DelayNs;
-use crate::ehal_02::timer::{CountDown, Periodic};
-use crate::time::Nanoseconds;
 use crate::timer_params::TimerParams;
 use crate::timer_traits::InterruptDrivenTimer;
 
@@ -57,29 +55,6 @@ where
     }
 }
 
-impl<TC> Periodic for TimerCounter<TC> {}
-impl<TC> CountDown for TimerCounter<TC>
-where
-    TC: Count16,
-{
-    type Time = Nanoseconds;
-
-    fn start<T>(&mut self, timeout: T)
-    where
-        T: Into<Self::Time>,
-    {
-        <Self as InterruptDrivenTimer>::start(self, timeout);
-    }
-
-    fn wait(&mut self) -> nb::Result<(), void::Void> {
-        nb::block! {
-            <Self as InterruptDrivenTimer>::wait(self)
-        }
-        .unwrap(); // wait() is Infallible
-        Ok(())
-    }
-}
-
 impl<TC> DelayNs for TimerCounter<TC>
 where
     TC: Count16,
diff --git a/hal/src/peripherals/timer/d11.rs b/hal/src/peripherals/timer/d11.rs
index b484eabf417c..81ba1fdfae8b 100644
--- a/hal/src/peripherals/timer/d11.rs
+++ b/hal/src/peripherals/timer/d11.rs
@@ -3,9 +3,9 @@ use atsamd_hal_macros::hal_cfg;
 
 use crate::pac::Pm;
 #[hal_cfg("tc1-d11")]
-use crate::pac::{tc1::Count16 as Count16Reg, Tc1};
+use crate::pac::{Tc1, tc1::Count16 as Count16Reg};
 #[hal_cfg("tc3-d21")]
-use crate::pac::{tc3::Count16 as Count16Reg, Tc3, Tc4, Tc5};
+use crate::pac::{Tc3, Tc4, Tc5, tc3::Count16 as Count16Reg};
 
 use crate::clock;
 use crate::time::Hertz;
diff --git a/hal/src/peripherals/trng.rs b/hal/src/peripherals/trng.rs
index e6f76e14b32d..8e89f56042f4 100644
--- a/hal/src/peripherals/trng.rs
+++ b/hal/src/peripherals/trng.rs
@@ -2,8 +2,6 @@ use crate::pac::{self, Mclk};
 
 use rand_core::{CryptoRng, RngCore};
 
-use crate::ehal_02::blocking::rng::Read;
-
 pub struct Trng(pac::Trng);
 
 impl Trng {
@@ -57,10 +55,13 @@ impl RngCore for Trng {
 
 impl CryptoRng for Trng {}
 
-impl Read for Trng {
-    type Error = ();
-    fn read(&mut self, buffer: &mut [u8]) -> Result<(), Self::Error> {
+impl embedded_io::ErrorType for Trng {
+    type Error = core::convert::Infallible;
+}
+
+impl embedded_io::Read for Trng {
+    fn read(&mut self, buffer: &mut [u8]) -> Result<usize, Self::Error> {
         self.random(buffer);
-        Ok(())
+        Ok(buffer.len())
     }
 }
diff --git a/hal/src/peripherals/watchdog.rs b/hal/src/peripherals/watchdog.rs
index 13e23dea208b..54ba5388096a 100644
--- a/hal/src/peripherals/watchdog.rs
+++ b/hal/src/peripherals/watchdog.rs
@@ -1,4 +1,3 @@
-use crate::ehal_02::watchdog;
 use crate::pac::Wdt;
 use atsamd_hal_macros::hal_macro_helper;
 
@@ -31,18 +30,16 @@ impl Watchdog {
     }
 }
 
-impl watchdog::Watchdog for Watchdog {
+impl Watchdog {
     /// Feeds an existing watchdog to ensure the processor isn't reset.
     /// Sometimes commonly referred to as "kicking" or "refreshing".
-    fn feed(&mut self) {
+    pub fn feed(&mut self) {
         self.wdt.clear().write(|w| unsafe { w.clear().bits(0xA5) });
     }
-}
 
-/// Disables a running watchdog timer so the processor won't be reset.
-impl watchdog::WatchdogDisable for Watchdog {
+    /// Disables a running watchdog timer so the processor won't be reset.
     #[hal_macro_helper]
-    fn disable(&mut self) {
+    pub fn disable(&mut self) {
         #[hal_cfg(any("wdt-d11", "wdt-d21"))]
         {
             // Disable the watchdog timer.
@@ -58,10 +55,6 @@ impl watchdog::WatchdogDisable for Watchdog {
             while self.wdt.syncbusy().read().enable().bit_is_set() {}
         }
     }
-}
-
-impl watchdog::WatchdogEnable for Watchdog {
-    type Time = u8;
 
     /// Enables a watchdog timer to reset the processor if software is frozen
     /// or stalled. Pass [`WatchdogTimeout`] as the period.
@@ -72,9 +65,9 @@ impl watchdog::WatchdogEnable for Watchdog {
     /// EG:
     /// `Timeout of 2048 cycles = (1/1024)*2048 = 2 seconds`
     #[hal_macro_helper]
-    fn start<T>(&mut self, period: T)
+    pub fn start<T>(&mut self, period: T)
     where
-        T: Into<Self::Time>,
+        T: Into<u8>,
     {
         // Write the timeout configuration.
         self.wdt
diff --git a/hal/src/prelude.rs b/hal/src/prelude.rs
index d7f1b3cb1350..2d0813bb1287 100644
--- a/hal/src/prelude.rs
+++ b/hal/src/prelude.rs
@@ -4,14 +4,6 @@ pub use crate::timer_traits::InterruptDrivenTimer;
 pub use fugit::ExtU32 as _;
 pub use fugit::RateExtU32 as _;
 
-// embedded-hal doesn’t yet have v2 in its prelude, so we need to
-// export it ourselves
-pub use crate::ehal_02::digital::v2::InputPin as _atsamd_hal_embedded_hal_digital_v2_InputPin;
-pub use crate::ehal_02::digital::v2::OutputPin as _atsamd_hal_embedded_hal_digital_v2_OutputPin;
-pub use crate::ehal_02::digital::v2::ToggleableOutputPin as _atsamd_hal_embedded_hal_digital_v2_ToggleableOutputPin;
-
-pub use crate::ehal_02::prelude::*;
-
 #[cfg(feature = "rtic")]
 pub use rtic_time::Monotonic as _;
 
diff --git a/hal/src/rtc/mod.rs b/hal/src/rtc/mod.rs
index 72535e5d82cc..62c52b84ccc2 100644
--- a/hal/src/rtc/mod.rs
+++ b/hal/src/rtc/mod.rs
@@ -3,7 +3,6 @@ use atsamd_hal_macros::hal_cfg;
 use fugit::ExtU32;
 
 use crate::ehal;
-use crate::ehal_02;
 use crate::pac;
 use crate::time::{Hertz, Nanoseconds};
 use crate::timer_traits::InterruptDrivenTimer;
@@ -201,25 +200,6 @@ impl Rtc<ClockMode> {
 }
 
 // --- Timer / Counter Functionality
-impl ehal_02::timer::Periodic for Rtc<Count32Mode> {}
-impl ehal_02::timer::CountDown for Rtc<Count32Mode> {
-    type Time = Nanoseconds;
-
-    /// Starts the timer and puts it in periodic mode in which the counter
-    /// counts up to the specified `timeout` and then resets repeatedly back
-    /// to zero.
-    fn start<T>(&mut self, timeout: T)
-    where
-        T: Into<Self::Time>,
-    {
-        <Self as InterruptDrivenTimer>::start(self, timeout);
-    }
-
-    fn wait(&mut self) -> nb::Result<(), void::Void> {
-        <Self as InterruptDrivenTimer>::wait(self).map_err(|e| e.map(|_| panic!()))
-    }
-}
-
 impl ehal::delay::DelayNs for Rtc<Count32Mode> {
     fn delay_ns(&mut self, ns: u32) {
         <Self as InterruptDrivenTimer>::start(self, ns.nanos());
diff --git a/hal/src/sercom/i2c/async_api.rs b/hal/src/sercom/i2c/async_api.rs
index 7b07651bcd3f..3210bee8a79d 100644
--- a/hal/src/sercom/i2c/async_api.rs
+++ b/hal/src/sercom/i2c/async_api.rs
@@ -275,7 +275,7 @@ impl<C: AnyConfig> I2cTrait for I2cFuture<C> {
 
 #[cfg(feature = "dma")]
 mod dma {
-    use embedded_hal_1::i2c::Operation;
+    use embedded_hal::i2c::Operation;
     use embedded_hal_async::i2c::I2c as I2cTrait;
 
     use super::*;
diff --git a/hal/src/sercom/i2c/impl_ehal.rs b/hal/src/sercom/i2c/impl_ehal.rs
index be677df50c23..47d75f792e8f 100644
--- a/hal/src/sercom/i2c/impl_ehal.rs
+++ b/hal/src/sercom/i2c/impl_ehal.rs
@@ -461,36 +461,6 @@ mod dma {
     }
 }
 
-impl<C: AnyConfig> crate::ehal_02::blocking::i2c::Write for I2c<C> {
-    type Error = Error;
-
-    fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error> {
-        self.do_write(addr, bytes)?;
-        self.cmd_stop();
-        Ok(())
-    }
-}
-
-impl<C: AnyConfig> crate::ehal_02::blocking::i2c::Read for I2c<C> {
-    type Error = Error;
-
-    fn read(&mut self, addr: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
-        self.do_read(addr, buffer)?;
-        self.cmd_stop();
-        Ok(())
-    }
-}
-
-impl<C: AnyConfig> crate::ehal_02::blocking::i2c::WriteRead for I2c<C> {
-    type Error = Error;
-
-    fn write_read(&mut self, addr: u8, bytes: &[u8], buffer: &mut [u8]) -> Result<(), Self::Error> {
-        self.do_write_read(addr, bytes, buffer)?;
-        self.cmd_stop();
-        Ok(())
-    }
-}
-
 /// Arrange all operations in contiguous chunks of the same R/W type
 pub(super) fn chunk_operations<'a, 'op>(
     operations: &'a mut [Operation<'op>],
diff --git a/hal/src/sercom/spi/impl_ehal/mod.rs b/hal/src/sercom/spi/impl_ehal/mod.rs
index fc8a1171bd11..05ad90c7b9e5 100644
--- a/hal/src/sercom/spi/impl_ehal/mod.rs
+++ b/hal/src/sercom/spi/impl_ehal/mod.rs
@@ -1,7 +1,5 @@
 use super::*;
 use crate::ehal::spi::{self, SpiBus};
-#[allow(unused_imports)]
-use crate::ehal_02::{blocking, serial};
 use crate::ehal_nb;
 use num_traits::PrimInt;
 
diff --git a/hal/src/sercom/spi/impl_ehal/thumbv6m.rs b/hal/src/sercom/spi/impl_ehal/thumbv6m.rs
index 7a8dab9ddf6e..1669ba763ed5 100644
--- a/hal/src/sercom/spi/impl_ehal/thumbv6m.rs
+++ b/hal/src/sercom/spi/impl_ehal/thumbv6m.rs
@@ -112,31 +112,6 @@ where
     }
 }
 
-/// Implement [`serial::Read`] for [`Rx`] [`Spi`] structs in a [`MasterMode`]
-///
-/// [`Read`] is only implemented for `Spi` structs with `Rx`
-/// [`Capability`]. In a `MasterMode`, `Read` has to initiate transactions, so
-/// it keeps track of the transaction state. If a transaction is in progress,
-/// it will wait on `RXC`. If not, it will wait on `DRE`, and then send `0`.
-///
-/// [`Read`]: crate::ehal_02::serial::Read
-impl<P, M, C> serial::Read<C::Word> for Spi<Config<P, M, C>, Rx>
-where
-    Config<P, M, C>: ValidConfig,
-    P: ValidPads,
-    M: MasterMode,
-    C: CharSize,
-    C::Word: PrimInt,
-    DataWidth: AsPrimitive<C::Word>,
-{
-    type Error = Error;
-
-    #[inline]
-    fn read(&mut self) -> nb::Result<C::Word, Error> {
-        <Self as ehal_nb::serial::Read<C::Word>>::read(self)
-    }
-}
-
 /// Implement [`Read`] for [`Rx`] [`Spi`] structs in [`Slave`]
 /// [`OpMode`]
 ///
@@ -166,30 +141,6 @@ where
     }
 }
 
-/// Implement [`serial::Read`] for [`Rx`] [`Spi`] structs in [`Slave`]
-/// [`OpMode`]
-///
-/// [`serial::Read`] is only implemented for `Spi` structs with `Rx`
-/// [`Capability`]. In `Slave` `OpMode`, `Read` does not have to initiate
-/// transactions, so it does not have to store any internal state. It only has
-/// to wait on `RXC`.
-impl<P, C> serial::Read<C::Word> for Spi<Config<P, Slave, C>, Rx>
-where
-    Config<P, Slave, C>: ValidConfig,
-    P: ValidPads,
-    C: CharSize,
-    C::Word: PrimInt,
-    DataWidth: AsPrimitive<C::Word>,
-{
-    type Error = Error;
-
-    /// Wait for an `RXC` flag, then read the word
-    #[inline]
-    fn read(&mut self) -> nb::Result<C::Word, Error> {
-        <Self as ehal_nb::serial::Read<C::Word>>::read(self)
-    }
-}
-
 //=============================================================================
 // embedded_io::Read
 //=============================================================================
@@ -269,43 +220,6 @@ where
     }
 }
 
-/// Implement [`serial::Write`] for [`Tx`] [`Spi`] structs
-///
-/// `serial::Write` is only implemented for `Spi` structs with `Tx`
-/// [`Capability`]. Because the `Capability` is `Tx`, this implementation never
-/// reads the DATA register and ignores all buffer overflow errors.
-impl<P, M, C> serial::Write<C::Word> for Spi<Config<P, M, C>, Tx>
-where
-    Config<P, M, C>: ValidConfig,
-    P: ValidPads,
-    M: OpMode,
-    C: CharSize,
-    C::Word: PrimInt + AsPrimitive<DataWidth>,
-{
-    type Error = Error;
-
-    #[inline]
-    fn write(&mut self, word: C::Word) -> nb::Result<(), Error> {
-        <Self as ehal_nb::serial::Write<C::Word>>::write(self, word)
-    }
-
-    #[inline]
-    fn flush(&mut self) -> nb::Result<(), Error> {
-        <Self as ehal_nb::serial::Write<C::Word>>::flush(self)
-    }
-}
-
-//=============================================================================
-// blocking::serial::Write
-//=============================================================================
-
-impl<C> blocking::serial::write::Default<C::Word> for Spi<C, Tx>
-where
-    C: ValidConfig,
-    Spi<C, Tx>: serial::Write<C::Word>,
-{
-}
-
 //=============================================================================
 // embedded_io::Write
 //=============================================================================
@@ -366,289 +280,3 @@ where
         }
     }
 }
-
-/// Implement embedded-hal 0.2 [`spi::FullDuplex`] for [`Spi`] structs with [`AtomicSize`]
-///
-/// `spi::FullDuplex` is only implemented when the `Spi` struct has [`Duplex`]
-/// [`Capability`]. The [`Word`] size used in the implementation depends on the
-/// corresponding [`CharSize`].
-///
-/// [`spi::FullDuplex`]: crate::ehal_02::spi::FullDuplex
-impl<C> crate::ehal_02::spi::FullDuplex<C::Word> for Spi<C, Duplex>
-where
-    C: ValidConfig,
-    C::Word: PrimInt + AsPrimitive<u16>,
-    u16: AsPrimitive<C::Word>,
-{
-    type Error = Error;
-
-    #[inline]
-    fn read(&mut self) -> nb::Result<C::Word, Error> {
-        let flags = self.read_flags_errors()?;
-        if flags.contains(Flags::RXC) {
-            unsafe { Ok(self.read_data().as_()) }
-        } else {
-            Err(WouldBlock)
-        }
-    }
-
-    #[inline]
-    fn send(&mut self, word: C::Word) -> nb::Result<(), Error> {
-        let flags = self.read_flags_errors()?;
-        if flags.contains(Flags::DRE) {
-            unsafe { self.write_data(word.as_()) };
-            Ok(())
-        } else {
-            Err(WouldBlock)
-        }
-    }
-}
-
-//=============================================================================
-// Note on macros
-//=============================================================================
-
-// Macros are necessary for the following implementations of the embedded HAL
-// `blocking` traits because of a limitation in the Rust trait system. The
-// compiler can't seem to recongnize that the `blocking::spi::*::Default` traits
-// can never be implemented for [`Spi`] in downstream crates, because that would
-// violate the orphan rules.
-
-//=============================================================================
-// blocking::spi::Transfer
-//=============================================================================
-
-macro_rules! impl_blocking_spi_transfer {
-    ( $($CharSize:ident),+ ) => {
-        $(
-            /// Implement [`Transfer`] for [`Spi`] structs that can [`Receive`]
-            ///
-            /// The transfer accepts a slice of primitive integers, depending on
-            /// the [`CharSize`] (`u8` or `u16`).
-            ///
-            /// [`Transfer`]: blocking::spi::Transfer
-            impl<P, M, A> blocking::spi::Transfer<Word<$CharSize>> for Spi<Config<P, M, $CharSize>, A>
-            where
-                Config<P, M, $CharSize>: ValidConfig,
-                P: ValidPads,
-                M: OpMode,
-                A: Receive,
-            {
-                type Error = Error;
-
-                #[inline]
-                fn transfer<'w>(&mut self, words: &'w mut [Word<$CharSize>]) -> Result<&'w [Word<$CharSize>], Error> {
-                    let cells = core::cell::Cell::from_mut(words).as_slice_of_cells();
-                    let mut to_send = cells.iter();
-                    let mut to_recv = cells.iter();
-                    while to_recv.len() > 0 {
-                        let flags = self.read_flags_errors()?;
-                        if to_send.len() > 0 && flags.contains(Flags::DRE) {
-                            let word = match to_send.next() {
-                                Some(cell) => cell.get(),
-                                None => unreachable!(),
-                            };
-                            self.config.as_mut().regs.write_data(word as u16);
-                        }
-                        if to_recv.len() > to_send.len() && flags.contains(Flags::RXC) {
-                            let word = self.config.as_mut().regs.read_data() as Word<$CharSize>;
-                            match to_recv.next() {
-                                Some(cell) => cell.set(word),
-                                None => unreachable!(),
-                            }
-                        }
-                    }
-                    Ok(words)
-                }
-            }
-        )+
-    }
-}
-
-impl_blocking_spi_transfer!(EightBit, NineBit);
-
-//=============================================================================
-// blocking::spi::Write
-//=============================================================================
-
-macro_rules! impl_blocking_spi_write {
-    ( $($CharSize:ident),+ ) => {
-        $(
-            /// Implement [`Write`] for [`Spi`] structs with [`Duplex`]
-            /// [`Capability`]
-            ///
-            /// The transfer accepts a slice of primitive integers, depending on
-            /// the [`CharSize`] (`u8` or `u16`).
-            ///
-            /// [`Write`]: blocking::spi::Write
-            impl<P, M> blocking::spi::Write<Word<$CharSize>> for Spi<Config<P, M, $CharSize>, Duplex>
-            where
-                Config<P, M, $CharSize>: ValidConfig,
-                P: ValidPads,
-                M: OpMode,
-            {
-                type Error = Error;
-
-                #[inline]
-                fn write(&mut self, words: &[Word<$CharSize>]) -> Result<(), Error> {
-                    // We are `Duplex`, so we must receive as many words as we send,
-                    // otherwise we could trigger an overflow
-                    let mut to_send = words.iter();
-                    let mut to_recv = to_send.len();
-                    while to_recv > 0 {
-                        let flags = self.read_flags_errors()?;
-                        if to_send.len() > 0 && flags.contains(Flags::DRE) {
-                            let word = match to_send.next() {
-                                Some(word) => *word,
-                                None => unreachable!(),
-                            };
-                            self.config.as_mut().regs.write_data(word as u16);
-                        }
-                        if to_recv > to_send.len() && flags.contains(Flags::RXC) {
-                            self.config.as_mut().regs.read_data();
-                            to_recv -= 1;
-                        }
-                    }
-                    Ok(())
-                }
-            }
-
-            /// Implement [`Write`] for [`Spi`] structs with [`Tx`]
-            /// [`Capability`]
-            ///
-            /// The transfer accepts a slice of primitive integers, depending on
-            /// the [`CharSize`] (`u8` or `u16`).
-            ///
-            /// Because the `Capability` is `Tx`, this implementation never
-            /// reads the DATA register and ignores all buffer overflow errors.
-            ///
-            /// [`Write`]: blocking::spi::Write
-            impl<P, M> blocking::spi::Write<Word<$CharSize>> for Spi<Config<P, M, $CharSize>, Tx>
-            where
-                Config<P, M, $CharSize>: ValidConfig,
-                P: ValidPads,
-                M: OpMode,
-            {
-                type Error = Error;
-
-                #[inline]
-                fn write(&mut self, words: &[Word<$CharSize>]) -> Result<(), Error> {
-                    // We are `Tx`, so we don't have to consider reading at all, ever.
-                    for word in words {
-                        loop {
-                            // Ignore buffer overflow errors
-                            if self.read_status().contains(Status::LENERR) {
-                                return Err(Error::LengthError)
-                            } else if self.read_flags().contains(Flags::DRE) {
-                                self.config.as_mut().regs.write_data(*word as u16);
-                                break
-                            }
-                        }
-                    }
-                    // Wait until all data is shifted out
-                    while !self.read_flags().contains(Flags::TXC) {}
-                    Ok(())
-                }
-            }
-        )+
-    }
-}
-
-impl_blocking_spi_write!(EightBit, NineBit);
-
-//=============================================================================
-// blocking::spi::WriteIter
-//=============================================================================
-
-macro_rules! impl_blocking_spi_write_iter {
-    ( $($CharSize:ident),+ ) => {
-        $(
-            /// Implement [`WriteIter`] for [`Spi`] structs with [`Duplex`]
-            /// [`Capability`]
-            ///
-            /// The transfer accepts a slice of primitive integers, depending on
-            /// the [`CharSize`] (`u8` or `u16`).
-            ///
-            /// [`WriteIter`]: blocking::spi::WriteIter
-            impl<P, M> blocking::spi::WriteIter<Word<$CharSize>> for Spi<Config<P, M, $CharSize>, Duplex>
-            where
-                Config<P, M, $CharSize>: ValidConfig,
-                P: ValidPads,
-                M: OpMode,
-            {
-                type Error = Error;
-
-                #[inline]
-                fn write_iter<WI>(&mut self, words: WI) -> Result<(), Error>
-                where
-                    WI: IntoIterator<Item = Word<$CharSize>>,
-                {
-                    // We are `Duplex`, so we must receive as many words as we send,
-                    // otherwise we could trigger an overflow. However, we don't know
-                    // how many words there are to start with, so we have to send and
-                    // receive them one at a time.
-                    for word in words.into_iter() {
-                        loop {
-                            let flags = self.read_flags_errors()?;
-                            if flags.contains(Flags::DRE) {
-                                unsafe { self.write_data(word as u16) };
-                                break
-                            }
-                        }
-                        loop {
-                            let flags = self.read_flags_errors()?;
-                            if flags.contains(Flags::RXC) {
-                                self.config.as_mut().regs.read_data() as Word<$CharSize>;
-                                break
-                            }
-                        }
-                    }
-                    Ok(())
-                }
-            }
-
-            /// Implement [`WriteIter`] for [`Spi`] structs with [`Tx`]
-            /// [`Capability`]
-            ///
-            /// The transfer accepts a slice of primitive integers, depending on
-            /// the [`CharSize`] (`u8` or `u16`).
-            ///
-            /// Because the `Capability` is `Tx`, this implementation never
-            /// reads the DATA register and ignores all buffer overflow errors.
-            ///
-            /// [`WriteIter`]: blocking::spi::WriteIter
-            impl<P, M> blocking::spi::WriteIter<Word<$CharSize>> for Spi<Config<P, M, $CharSize>, Tx>
-            where
-                Config<P, M, $CharSize>: ValidConfig,
-                P: ValidPads,
-                M: OpMode,
-            {
-                type Error = Error;
-
-                #[inline]
-                fn write_iter<WI>(&mut self, words: WI) -> Result<(), Error>
-                where
-                    WI: IntoIterator<Item = Word<$CharSize>>,
-                {
-                    // We are `Tx`, so we don't have to consider reading at all, ever.
-                    for word in words.into_iter() {
-                        loop {
-                            // Ignore buffer overflow errors
-                            if self.read_status().contains(Status::LENERR) {
-                                return Err(Error::LengthError)
-                            } else if self.read_flags().contains(Flags::DRE) {
-                                unsafe { self.write_data(word as u16) };
-                                break
-                            }
-                        }
-                    }
-                    // Wait until all data is shifted out
-                    while !self.read_flags().contains(Flags::TXC) {}
-                    Ok(())
-                }
-            }
-        )+
-    };
-}
-
-impl_blocking_spi_write_iter!(EightBit, NineBit);
diff --git a/hal/src/sercom/spi/impl_ehal/thumbv7em.rs b/hal/src/sercom/spi/impl_ehal/thumbv7em.rs
index 2d7db2623098..2a01ac2c3626 100644
--- a/hal/src/sercom/spi/impl_ehal/thumbv7em.rs
+++ b/hal/src/sercom/spi/impl_ehal/thumbv7em.rs
@@ -94,7 +94,6 @@
 //!
 //! [`Size`]: super::Size
 
-use crate::ehal_02;
 use crate::ehal_nb;
 #[cfg(doc)]
 use crate::sercom::spi::Capability;
diff --git a/hal/src/sercom/uart/impl_ehal.rs b/hal/src/sercom/uart/impl_ehal.rs
index 54df1068cf49..281f01de332f 100644
--- a/hal/src/sercom/uart/impl_ehal.rs
+++ b/hal/src/sercom/uart/impl_ehal.rs
@@ -1,63 +1,14 @@
 //! `embedded-hal` trait implementations for [`Uart`]s
 
 use super::{
-    Capability, Config, DataReg, EightBit, Error, Error as UartError, Flags, Receive, Transmit,
-    Uart, ValidConfig, ValidPads,
-};
-use crate::{
-    ehal_02::{
-        blocking,
-        serial::{Read, Write},
-    },
-    typelevel::NoneT,
+    Capability, Config, DataReg, EightBit, Error, Flags, Receive, Transmit, Uart, ValidConfig,
+    ValidPads,
 };
+use crate::typelevel::NoneT;
 use nb::Error::WouldBlock;
 use num_traits::AsPrimitive;
 
-impl<C, D> Read<C::Word> for Uart<C, D>
-where
-    C: ValidConfig,
-    D: Receive,
-    DataReg: AsPrimitive<C::Word>,
-{
-    type Error = Error;
-
-    /// Wait for an `RXC` flag, then read the word
-    #[inline]
-    fn read(&mut self) -> nb::Result<C::Word, Error> {
-        <Self as embedded_hal_nb::serial::Read<C::Word>>::read(self)
-    }
-}
-
-impl<C, D> Write<C::Word> for Uart<C, D>
-where
-    C: ValidConfig,
-    D: Transmit,
-{
-    type Error = UartError;
-
-    /// Wait for a `DRE` flag, then write a word
-    #[inline]
-    fn write(&mut self, word: C::Word) -> nb::Result<(), Self::Error> {
-        <Self as embedded_hal_nb::serial::Write<C::Word>>::write(self, word)
-    }
-
-    /// Wait for a `TXC` flag
-    #[inline]
-    fn flush(&mut self) -> nb::Result<(), Self::Error> {
-        <Self as embedded_hal_nb::serial::Write<C::Word>>::flush(self)
-    }
-}
-
-impl<C, D> blocking::serial::write::Default<C::Word> for Uart<C, D>
-where
-    C: ValidConfig,
-    D: Transmit,
-    Uart<C, D>: Write<C::Word>,
-{
-}
-
-impl embedded_io::Error for UartError {
+impl embedded_io::Error for Error {
     #[inline]
     fn kind(&self) -> embedded_io::ErrorKind {
         embedded_io::ErrorKind::Other
@@ -69,7 +20,7 @@ where
     C: ValidConfig,
     D: Capability,
 {
-    type Error = UartError;
+    type Error = Error;
 }
 
 impl<P, D, R> embedded_io::Write for Uart<Config<P, EightBit>, D, R, NoneT>
@@ -116,7 +67,7 @@ where
     }
 }
 
-impl embedded_hal_nb::serial::Error for UartError {
+impl embedded_hal_nb::serial::Error for Error {
     #[inline]
     fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
         use embedded_hal_nb::serial::ErrorKind;
@@ -136,7 +87,7 @@ where
     W: Copy,
     D: Capability,
 {
-    type Error = UartError;
+    type Error = Error;
 }
 
 impl<C, D, R, T> embedded_hal_nb::serial::Read<C::Word> for Uart<C, D, R, T>
diff --git a/hal/src/sleeping_delay.rs b/hal/src/sleeping_delay.rs
index 515c6749dfb1..1241be9d5a07 100644
--- a/hal/src/sleeping_delay.rs
+++ b/hal/src/sleeping_delay.rs
@@ -4,7 +4,6 @@ use cortex_m::asm;
 use fugit::ExtU32;
 
 use crate::ehal::delay::DelayNs;
-use crate::ehal_02;
 use crate::timer_traits::InterruptDrivenTimer;
 
 const NUM_NS_IN_S: u32 = 1_000_000_000;
@@ -36,26 +35,6 @@ where
     }
 }
 
-impl<TIM, TYPE> ehal_02::blocking::delay::DelayUs<TYPE> for SleepingDelay<TIM>
-where
-    TIM: InterruptDrivenTimer,
-    TYPE: Into<u32>,
-{
-    fn delay_us(&mut self, us: TYPE) {
-        <Self as DelayNs>::delay_us(self, us.into());
-    }
-}
-
-impl<TIM, TYPE> ehal_02::blocking::delay::DelayMs<TYPE> for SleepingDelay<TIM>
-where
-    TIM: InterruptDrivenTimer,
-    TYPE: Into<u32>,
-{
-    fn delay_ms(&mut self, ms: TYPE) {
-        <Self as DelayNs>::delay_ms(self, ms.into());
-    }
-}
-
 impl<TIM: InterruptDrivenTimer> DelayNs for SleepingDelay<TIM> {
     fn delay_ns(&mut self, ns: u32) {
         // Determine how many cycles we need to run for this delay, if any