diff --git a/config/boards/luckfox-nova-w.csc b/config/boards/luckfox-nova-w.csc new file mode 100644 index 000000000000..5c13eba0f025 --- /dev/null +++ b/config/boards/luckfox-nova-w.csc @@ -0,0 +1,50 @@ +BOARD_NAME="Luckfox Nova W" +BOARDFAMILY="rockchip64" +BOARD_MAINTAINER="nikvoid" + +BOOT_SOC="rk3308" +BOOTCONFIG="luckfox-nova-w_rk3308b_defconfig" +BOOT_FDT_FILE="rockchip/rk3308-luckfox-nova-w.dtb" +# eMMC works properly only in vendor branch +KERNEL_TARGET="vendor" +KERNELSOURCE='https://github.com/armbian/linux-rockchip.git' +KERNELBRANCH='branch:rk-6.1-rkr5.1' +KERNELPATCHDIR='rockchip64-vendor-6.1' +KERNEL_MAJOR_MINOR="6.1" +LINUXFAMILY="rockchip64" +LINUXCONFIG="linux-luckfox-nova-w-rk3308-vendor" + +DEFAULT_CONSOLE="serial" +SERIALCON="ttyS4" +MODULES="aic8800_fdrv" +MODULES_BLACKLIST="rockchipdrm analogix_dp dw_mipi_dsi dw_hdmi gpu_sched lima hantro_vpu panfrost" +HAS_VIDEO_OUTPUT="no" + +BOOTBRANCH_BOARD="tag:v2025.04" +BOOTPATCHDIR="v2025.04" +IMAGE_PARTITION_TABLE="gpt" + +BOOT_SCENARIO="binman" +DDR_BLOB="rk33/rk3308_ddr_589MHz_uart4_m0_v2.07.bin" +BL31_BLOB="rk33/rk3308_bl31_v2.26.elf" +MINILOADER_BLOB="rk33/rk3308_miniloader_v1.39.bin" + +FORCE_UBOOT_UPDATE="yes" +OVERLAY_PREFIX="rk3308-luckfox-nova" + +function post_family_config__bootscript() { + declare -g BOOTSCRIPT="boot-rockchip64-ttyS4.cmd:boot.cmd" +} + +function pre_install_kernel_debs__enforce_cma() { + # Set CMA to 16 megabytes, to provide more usable RAM since board + # has usually a small amount of DRAM (512MB) + display_alert "$BOARD" "set CMA size to 16MB due to small DRAM size" + run_host_command_logged echo "extraargs=cma=16M" ">>" "${SDCARD}"/boot/armbianEnv.txt + + return 0 +} + +function post_family_tweaks__move_wlan_fw() { + mv "${SDCARD}/lib/firmware/aic8800/SDIO/aic8800DC" "${SDCARD}/lib/firmware/aic8800/SDIO/aic8800dc" +} diff --git a/config/bootscripts/boot-rockchip64-ttyS4.cmd b/config/bootscripts/boot-rockchip64-ttyS4.cmd new file mode 100644 index 000000000000..3e8ca79aa89a --- /dev/null +++ b/config/bootscripts/boot-rockchip64-ttyS4.cmd @@ -0,0 +1,82 @@ +# DO NOT EDIT THIS FILE +# +# Please edit /boot/armbianEnv.txt to set supported parameters +# + +setenv load_addr "0x9000000" +setenv overlay_error "false" +# default values +setenv rootdev "/dev/mmcblk0p1" +setenv verbosity "1" +setenv console "both" +setenv bootlogo "false" +setenv rootfstype "ext4" +setenv docker_optimizations "off" +setenv earlycon "on" +setenv usbstoragequirks "" + +test -n "${distro_bootpart}" || distro_bootpart=1 + +echo "Boot script loaded from ${devtype} ${devnum}:${distro_bootpart}" + +if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}armbianEnv.txt; then + load ${devtype} ${devnum}:${distro_bootpart} ${load_addr} ${prefix}armbianEnv.txt + env import -t ${load_addr} ${filesize} +fi + +if test "${logo}" = "disabled"; then setenv logo "logo.nologo"; fi + +if test "${console}" = "display" || test "${console}" = "both"; then setenv consoleargs "console=tty0"; fi +if test "${console}" = "serial" || test "${console}" = "both"; then setenv consoleargs "console=ttyS4,1500000 ${consoleargs}"; fi +if test "${earlycon}" = "on"; then setenv consoleargs "earlycon ${consoleargs}"; fi +if test "${bootlogo}" = "true"; then + setenv consoleargs "splash plymouth.ignore-serial-consoles ${consoleargs}" +else + setenv consoleargs "splash=verbose ${consoleargs}" +fi + +# get PARTUUID of first partition on SD/eMMC the boot script was loaded from +if test "${devtype}" = "mmc"; then part uuid mmc ${devnum}:${distro_bootpart} partuuid; fi + +setenv bootargs "root=${rootdev} rootwait rootfstype=${rootfstype} ${consoleargs} consoleblank=0 loglevel=${verbosity} ubootpart=${partuuid} usb-storage.quirks=${usbstoragequirks} ${extraargs} ${extraboardargs}" + +if test "${docker_optimizations}" = "on"; then setenv bootargs "${bootargs} cgroup_enable=cpuset cgroup_memory=1 cgroup_enable=memory"; fi + +load ${devtype} ${devnum}:${distro_bootpart} ${ramdisk_addr_r} ${prefix}uInitrd +load ${devtype} ${devnum}:${distro_bootpart} ${kernel_addr_r} ${prefix}Image + +load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} ${prefix}dtb/${fdtfile} +fdt addr ${fdt_addr_r} +fdt resize 65536 +for overlay_file in ${overlays}; do + if load ${devtype} ${devnum}:${distro_bootpart} ${load_addr} ${prefix}dtb/rockchip/overlay/${overlay_prefix}-${overlay_file}.dtbo; then + echo "Applying kernel provided DT overlay ${overlay_prefix}-${overlay_file}.dtbo" + fdt apply ${load_addr} || setenv overlay_error "true" + fi +done +for overlay_file in ${user_overlays}; do + if load ${devtype} ${devnum}:${distro_bootpart} ${load_addr} ${prefix}overlay-user/${overlay_file}.dtbo; then + echo "Applying user provided DT overlay ${overlay_file}.dtbo" + fdt apply ${load_addr} || setenv overlay_error "true" + fi +done +if test "${overlay_error}" = "true"; then + echo "Error applying DT overlays, restoring original DT" + load ${devtype} ${devnum}:${distro_bootpart} ${fdt_addr_r} ${prefix}dtb/${fdtfile} +else + if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}dtb/rockchip/overlay/${overlay_prefix}-fixup.scr; then + load ${devtype} ${devnum}:${distro_bootpart} ${load_addr} ${prefix}dtb/rockchip/overlay/${overlay_prefix}-fixup.scr + echo "Applying kernel provided DT fixup script (${overlay_prefix}-fixup.scr)" + source ${load_addr} + fi + if test -e ${devtype} ${devnum}:${distro_bootpart} ${prefix}fixup.scr; then + load ${devtype} ${devnum}:${distro_bootpart} ${load_addr} ${prefix}fixup.scr + echo "Applying user provided fixup script (fixup.scr)" + source ${load_addr} + fi +fi + +booti ${kernel_addr_r} ${ramdisk_addr_r} ${fdt_addr_r} + +# Recompile with: +# mkimage -C none -A arm -T script -d /boot/boot.cmd /boot/boot.scr diff --git a/config/kernel/linux-luckfox-nova-w-rk3308-vendor.config b/config/kernel/linux-luckfox-nova-w-rk3308-vendor.config new file mode 100644 index 000000000000..b5e712bf34e1 --- /dev/null +++ b/config/kernel/linux-luckfox-nova-w-rk3308-vendor.config @@ -0,0 +1,499 @@ +# CONFIG_LOCALVERSION_AUTO is not set +CONFIG_DEFAULT_HOSTNAME="localhost" +CONFIG_SYSVIPC=y +CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y +CONFIG_BPF_SYSCALL=y +CONFIG_BPF_JIT=y +CONFIG_PREEMPT=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_LOG_BUF_SHIFT=18 +CONFIG_CGROUPS=y +CONFIG_MEMCG=y +CONFIG_BLK_CGROUP=y +CONFIG_CGROUP_SCHED=y +CONFIG_CFS_BANDWIDTH=y +CONFIG_RT_GROUP_SCHED=y +CONFIG_CGROUP_PIDS=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CPUSETS=y +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_CPUACCT=y +CONFIG_CGROUP_PERF=y +CONFIG_CGROUP_BPF=y +CONFIG_NAMESPACES=y +CONFIG_USER_NS=y +# CONFIG_RD_BZIP2 is not set +# CONFIG_RD_LZMA is not set +# CONFIG_RD_XZ is not set +# CONFIG_RD_LZO is not set +# CONFIG_RD_LZ4 is not set +CONFIG_BOOT_CONFIG=y +CONFIG_CC_OPTIMIZE_FOR_SIZE=y +CONFIG_EXPERT=y +CONFIG_KCMP=y +CONFIG_PROFILING=y +CONFIG_ARCH_ROCKCHIP=y +# CONFIG_ARM64_ERRATUM_826319 is not set +# CONFIG_ARM64_ERRATUM_827319 is not set +# CONFIG_ARM64_ERRATUM_824069 is not set +# CONFIG_ARM64_ERRATUM_819472 is not set +# CONFIG_ARM64_ERRATUM_832075 is not set +# CONFIG_ARM64_ERRATUM_845719 is not set +# CONFIG_ARM64_ERRATUM_843419 is not set +# CONFIG_CAVIUM_ERRATUM_22375 is not set +# CONFIG_CAVIUM_ERRATUM_23154 is not set +# CONFIG_CAVIUM_ERRATUM_27456 is not set +CONFIG_ARM64_VA_BITS_48=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_NR_CPUS=4 +CONFIG_HZ_1000=y +# CONFIG_UNMAP_KERNEL_AT_EL0 is not set +CONFIG_COMPAT=y +# CONFIG_ARM64_HW_AFDBM is not set +# CONFIG_ARM64_PAN is not set +CONFIG_RANDOMIZE_BASE=y +# CONFIG_EFI is not set +CONFIG_PM_DEBUG=y +CONFIG_PM_ADVANCED_DEBUG=y +CONFIG_WQ_POWER_EFFICIENT_DEFAULT=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_DEFAULT_GOV_INTERACTIVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPUFREQ_DT=y +CONFIG_ARM_ROCKCHIP_CPUFREQ=y +CONFIG_JUMP_LABEL=y +CONFIG_MODULES=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_UNLOAD=y +CONFIG_BLK_DEV_THROTTLING=y +CONFIG_PARTITION_ADVANCED=y +# CONFIG_SWAP is not set +# CONFIG_COMPAT_BRK is not set +# CONFIG_COMPACTION is not set +CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_PACKET_DIAG=y +CONFIG_UNIX=y +CONFIG_UNIX_DIAG=y +CONFIG_TLS=y +CONFIG_TLS_DEVICE=y +CONFIG_XFRM_USER=m +CONFIG_XFRM_INTERFACE=m +CONFIG_NET_KEY=m +CONFIG_INET=y +CONFIG_IP_MULTICAST=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_DHCP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_RARP=y +CONFIG_NET_IPIP=y +CONFIG_IP_MROUTE=y +CONFIG_INET_ESP=m +CONFIG_INET_UDP_DIAG=y +CONFIG_INET_RAW_DIAG=y +# CONFIG_IPV6_SIT is not set +CONFIG_NETFILTER=y +CONFIG_BRIDGE_NETFILTER=m +CONFIG_NF_CONNTRACK=y +CONFIG_NF_CONNTRACK_MARK=y +CONFIG_NF_CONNTRACK_ZONES=y +CONFIG_NF_CONNTRACK_EVENTS=y +CONFIG_NF_CONNTRACK_LABELS=y +CONFIG_NF_CONNTRACK_FTP=m +CONFIG_NF_CONNTRACK_IRC=m +CONFIG_NF_CONNTRACK_PPTP=m +CONFIG_NF_CONNTRACK_TFTP=m +CONFIG_NF_TABLES=y +CONFIG_NF_TABLES_INET=y +CONFIG_NF_TABLES_NETDEV=y +CONFIG_NFT_NAT=m +CONFIG_NFT_TUNNEL=m +CONFIG_NFT_QUOTA=m +CONFIG_NFT_REJECT=m +CONFIG_NFT_COMPAT=m +CONFIG_NFT_HASH=m +CONFIG_NFT_XFRM=m +CONFIG_NFT_SOCKET=m +CONFIG_NFT_TPROXY=m +CONFIG_NFT_SYNPROXY=m +CONFIG_NFT_DUP_NETDEV=m +CONFIG_NFT_FWD_NETDEV=m +CONFIG_NFT_REJECT_NETDEV=m +CONFIG_NETFILTER_XT_MARK=m +CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m +CONFIG_NETFILTER_XT_MATCH_BPF=m +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m +CONFIG_NETFILTER_XT_MATCH_IPVS=m +# CONFIG_NETFILTER_XT_MATCH_L2TP is not set +CONFIG_IP_VS=m +CONFIG_IP_VS_PROTO_TCP=y +CONFIG_IP_VS_PROTO_UDP=y +CONFIG_IP_VS_RR=m +CONFIG_IP_VS_NFCT=y +CONFIG_IP_NF_IPTABLES=y +CONFIG_IP_NF_FILTER=y +CONFIG_IP_NF_NAT=m +CONFIG_IP_NF_TARGET_MASQUERADE=m +CONFIG_IP_NF_TARGET_NETMAP=m +CONFIG_IP_NF_TARGET_REDIRECT=m +CONFIG_IP_NF_RAW=m +CONFIG_L2TP=y +CONFIG_BRIDGE=y +CONFIG_BRIDGE_VLAN_FILTERING=y +CONFIG_VLAN_8021Q=m +CONFIG_NET_SCHED=y +CONFIG_NET_CLS_CGROUP=m +CONFIG_DNS_RESOLVER=y +CONFIG_CGROUP_NET_PRIO=y +CONFIG_CAN=m +CONFIG_BT=m +CONFIG_BT_RFCOMM=y +CONFIG_BT_HIDP=y +CONFIG_BT_HCIUART=m +CONFIG_BT_HCIUART_H4=y +CONFIG_CFG80211_DEBUGFS=y +CONFIG_RFKILL=y +CONFIG_RFKILL_RK=y +CONFIG_NFC=m +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_ALLOW_DEV_COREDUMP is not set +CONFIG_ROCKCHIP_SIP=y +CONFIG_DTC_SYMBOLS=y +CONFIG_OF_OVERLAY=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_SCSI=m +CONFIG_BLK_DEV_SD=m +CONFIG_BLK_DEV_SR=m +CONFIG_CHR_DEV_SG=m +# CONFIG_BLK_DEV_BSG is not set +CONFIG_SCSI_CONSTANTS=y +CONFIG_SCSI_LOGGING=y +CONFIG_SCSI_SCAN_ASYNC=y +CONFIG_NETDEVICES=y +CONFIG_DUMMY=m +CONFIG_WIREGUARD=m +CONFIG_MACVLAN=m +CONFIG_IPVLAN=m +CONFIG_VXLAN=m +CONFIG_TUN=m +CONFIG_VETH=m +# CONFIG_NET_VENDOR_ALACRITECH is not set +# CONFIG_NET_VENDOR_AMAZON is not set +# CONFIG_NET_VENDOR_AMD is not set +# CONFIG_NET_VENDOR_AQUANTIA is not set +# CONFIG_NET_VENDOR_ARC is not set +# CONFIG_NET_VENDOR_BROADCOM is not set +# CONFIG_NET_VENDOR_CADENCE is not set +# CONFIG_NET_VENDOR_CAVIUM is not set +# CONFIG_NET_VENDOR_CORTINA is not set +# CONFIG_NET_VENDOR_EZCHIP is not set +# CONFIG_NET_VENDOR_GOOGLE is not set +# CONFIG_NET_VENDOR_HISILICON is not set +# CONFIG_NET_VENDOR_HUAWEI is not set +# CONFIG_NET_VENDOR_INTEL is not set +# CONFIG_NET_VENDOR_MARVELL is not set +# CONFIG_NET_VENDOR_MELLANOX is not set +# CONFIG_NET_VENDOR_MICREL is not set +# CONFIG_NET_VENDOR_MICROCHIP is not set +# CONFIG_NET_VENDOR_MICROSEMI is not set +# CONFIG_NET_VENDOR_NI is not set +# CONFIG_NET_VENDOR_NATSEMI is not set +# CONFIG_NET_VENDOR_NETRONOME is not set +# CONFIG_NET_VENDOR_PENSANDO is not set +CONFIG_QCA7000_SPI=m +# CONFIG_NET_VENDOR_RENESAS is not set +# CONFIG_NET_VENDOR_ROCKER is not set +# CONFIG_NET_VENDOR_SAMSUNG is not set +# CONFIG_NET_VENDOR_SEEQ is not set +# CONFIG_NET_VENDOR_SOLARFLARE is not set +# CONFIG_NET_VENDOR_SMSC is not set +# CONFIG_NET_VENDOR_SOCIONEXT is not set +CONFIG_STMMAC_ETH=y +# CONFIG_DWMAC_GENERIC is not set +# CONFIG_NET_VENDOR_SYNOPSYS is not set +# CONFIG_NET_VENDOR_VIA is not set +# CONFIG_NET_VENDOR_WIZNET is not set +# CONFIG_NET_VENDOR_XILINX is not set +CONFIG_AX88796B_PHY=y +CONFIG_REALTEK_PHY=y +CONFIG_CAN_ROCKCHIP=m +CONFIG_CANFD_ROCKCHIP=m +CONFIG_CAN_MCP251X=m +CONFIG_CAN_MCP251XFD=m +CONFIG_CAN_8DEV_USB=m +CONFIG_CAN_EMS_USB=m +CONFIG_CAN_ESD_USB=m +CONFIG_CAN_ETAS_ES58X=m +CONFIG_CAN_GS_USB=m +CONFIG_CAN_KVASER_USB=m +CONFIG_CAN_MCBA_USB=m +CONFIG_CAN_PEAK_USB=m +CONFIG_CAN_UCAN=m +CONFIG_PPP=m +CONFIG_PPP_ASYNC=m +CONFIG_USB_NET_DRIVERS=m +CONFIG_USB_RTL8150=m +CONFIG_USB_RTL8152=m +CONFIG_USB_USBNET=m +CONFIG_USB_NET_RNDIS_HOST=m +CONFIG_AIC_WLAN_SUPPORT=y +CONFIG_AIC_FW_PATH="/lib/firmware/aic8800/SDIO/aic8800dc/" +CONFIG_AIC8800_WLAN_SUPPORT=m +CONFIG_AIC8800_BTLPM_SUPPORT=m +CONFIG_WL_ROCKCHIP=y +CONFIG_WIFI_BUILD_MODULE=y +CONFIG_WIFI_LOAD_DRIVER_WHEN_KERNEL_BOOTUP=y +CONFIG_AP6XXX=m +CONFIG_INPUT_EVDEV=y +CONFIG_KEYBOARD_ADC=y +# CONFIG_KEYBOARD_ATKBD is not set +CONFIG_KEYBOARD_GPIO=y +# CONFIG_INPUT_MOUSE is not set +CONFIG_INPUT_MISC=y +CONFIG_INPUT_GPIO_ROTARY_ENCODER=y +# CONFIG_SERIO is not set +# CONFIG_VT is not set +# CONFIG_LEGACY_PTYS is not set +CONFIG_SERIAL_8250=y +# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set +CONFIG_SERIAL_8250_CONSOLE=y +CONFIG_SERIAL_8250_NR_UARTS=5 +CONFIG_SERIAL_8250_RUNTIME_UARTS=5 +CONFIG_SERIAL_8250_DW=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_ROCKCHIP=y +CONFIG_I2C=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_MUX=y +CONFIG_I2C_RK3X=y +CONFIG_SPI=y +CONFIG_SPI_DEBUG=y +CONFIG_SPI_GPIO=m +CONFIG_SPI_ROCKCHIP=m +CONFIG_SPI_ROCKCHIP_SFC=m +CONFIG_SPI_SPIDEV=m +CONFIG_GPIO_SYSFS=y +CONFIG_W1=m +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_BATTERY_RK816=y +# CONFIG_HWMON is not set +CONFIG_THERMAL=y +CONFIG_THERMAL_WRITABLE_TRIPS=y +CONFIG_THERMAL_GOV_USER_SPACE=y +CONFIG_CPU_THERMAL=y +CONFIG_DEVFREQ_THERMAL=y +CONFIG_ROCKCHIP_THERMAL=y +CONFIG_WATCHDOG=y +CONFIG_DW_WATCHDOG=y +CONFIG_MFD_RK808=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_RK808=y +# CONFIG_MEDIA_CEC_SUPPORT is not set +CONFIG_MEDIA_SUPPORT=m +# CONFIG_DRM_DEBUG_MODESET_LOCK is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_SOUND=m +CONFIG_SND=m +CONFIG_SND_HRTIMER=m +# CONFIG_SND_SUPPORT_OLD_API is not set +CONFIG_SND_ALOOP=m +# CONFIG_SND_SPI is not set +CONFIG_SND_SOC=m +CONFIG_SND_SOC_ROCKCHIP=m +CONFIG_SND_SOC_ROCKCHIP_I2S=m +CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=m +CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS=m +CONFIG_SND_SOC_ROCKCHIP_PDM=m +CONFIG_SND_SOC_ROCKCHIP_SPDIF=m +CONFIG_SND_SOC_ROCKCHIP_SPDIFRX=m +CONFIG_SND_SOC_ROCKCHIP_VAD=m +CONFIG_SND_SOC_DUMMY_CODEC=m +CONFIG_SND_SOC_RK3308=m +CONFIG_SND_SOC_TAS571X=m +CONFIG_SND_SIMPLE_CARD=m +CONFIG_HID_BATTERY_STRENGTH=y +CONFIG_HID_GENERIC=m +CONFIG_USB_HID=m +CONFIG_USB_CONN_GPIO=m +CONFIG_USB=y +CONFIG_USB_OTG=y +CONFIG_USB_OTG_FSM=m +CONFIG_USB_EHCI_HCD=m +CONFIG_USB_EHCI_HCD_PLATFORM=m +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_ACM=m +CONFIG_USB_STORAGE=m +CONFIG_USBIP_CORE=m +CONFIG_USBIP_HOST=m +CONFIG_USB_DWC2=m +CONFIG_USB_GADGET=m +CONFIG_USB_GADGET_DEBUG_FILES=y +CONFIG_USB_GADGET_VBUS_DRAW=500 +CONFIG_U_SERIAL_CONSOLE=y +CONFIG_USB_CONFIGFS=m +CONFIG_USB_CONFIGFS_UEVENT=y +CONFIG_USB_CONFIGFS_SERIAL=y +CONFIG_USB_CONFIGFS_ACM=y +CONFIG_USB_CONFIGFS_OBEX=y +CONFIG_USB_CONFIGFS_NCM=y +CONFIG_USB_CONFIGFS_ECM=y +CONFIG_USB_CONFIGFS_ECM_SUBSET=y +CONFIG_USB_CONFIGFS_RNDIS=y +CONFIG_USB_CONFIGFS_EEM=y +CONFIG_USB_CONFIGFS_MASS_STORAGE=y +CONFIG_USB_CONFIGFS_F_FS=y +CONFIG_USB_CONFIGFS_F_MIDI=y +CONFIG_USB_CONFIGFS_F_HID=y +CONFIG_USB_ETH=m +CONFIG_USB_ETH_EEM=y +CONFIG_USB_MASS_STORAGE=m +CONFIG_USB_G_SERIAL=m +CONFIG_USB_MIDI_GADGET=m +CONFIG_USB_CDC_COMPOSITE=m +CONFIG_USB_G_ACM_MS=m +CONFIG_USB_G_HID=m +CONFIG_TYPEC=y +CONFIG_USB_ROLE_SWITCH=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK_MINORS=32 +CONFIG_SDIO_UART=m +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_IS31FL32XX=y +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=y +CONFIG_LEDS_TRIGGER_ONESHOT=y +CONFIG_LEDS_TRIGGER_HEARTBEAT=y +CONFIG_LEDS_TRIGGER_DEFAULT_ON=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_RK808=y +CONFIG_DMADEVICES=y +CONFIG_PL330_DMA=y +CONFIG_SYNC_FILE=y +# CONFIG_VIRTIO_MENU is not set +# CONFIG_VHOST_MENU is not set +# CONFIG_SURFACE_PLATFORMS is not set +CONFIG_COMMON_CLK_RK808=y +# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set +# CONFIG_IOMMU_SUPPORT is not set +CONFIG_RPMSG_ROCKCHIP_SOFTIRQ=y +CONFIG_RPMSG_VIRTIO=y +CONFIG_CPU_RK3308=y +CONFIG_ROCKCHIP_AMP=y +CONFIG_ROCKCHIP_GRF=y +CONFIG_ROCKCHIP_IODOMAIN=y +CONFIG_ROCKCHIP_OPP=y +CONFIG_ROCKCHIP_PERFORMANCE=y +CONFIG_ROCKCHIP_PERFORMANCE_LEVEL=2 +CONFIG_ROCKCHIP_PM_DOMAINS=y +CONFIG_ROCKCHIP_PVTM=y +CONFIG_ROCKCHIP_SUSPEND_MODE=y +CONFIG_ROCKCHIP_SYSTEM_MONITOR=m +CONFIG_ROCKCHIP_VENDOR_STORAGE=y +CONFIG_ROCKCHIP_MMC_VENDOR_STORAGE=y +CONFIG_ROCKCHIP_VENDOR_STORAGE_UPDATE_LOADER=y +CONFIG_FIQ_DEBUGGER=y +CONFIG_FIQ_DEBUGGER_NO_SLEEP=y +CONFIG_FIQ_DEBUGGER_CONSOLE=y +CONFIG_FIQ_DEBUGGER_CONSOLE_DEFAULT_ENABLE=y +CONFIG_FIQ_DEBUGGER_TRUST_ZONE=y +CONFIG_RK_CONSOLE_THREAD=y +CONFIG_PM_DEVFREQ=y +CONFIG_DEVFREQ_GOV_PERFORMANCE=y +CONFIG_DEVFREQ_GOV_USERSPACE=y +CONFIG_ARM_ROCKCHIP_BUS_DEVFREQ=y +CONFIG_ARM_ROCKCHIP_DMC_DEVFREQ=y +CONFIG_DEVFREQ_EVENT_ROCKCHIP_NOCP=y +CONFIG_IIO=y +CONFIG_ROCKCHIP_SARADC=y +CONFIG_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_EMMC=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=m +CONFIG_PHY_ROCKCHIP_USB=m +CONFIG_RK_FLASH=m +CONFIG_EXT2_FS=y +CONFIG_EXT4_FS=m +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_BTRFS_FS=y +CONFIG_BTRFS_FS_POSIX_ACL=y +# CONFIG_DNOTIFY is not set +CONFIG_FUSE_FS=m +CONFIG_OVERLAY_FS=m +CONFIG_VFAT_FS=m +CONFIG_EXFAT_FS=m +CONFIG_NTFS_FS=m +CONFIG_NTFS_RW=y +CONFIG_NTFS3_FS=m +CONFIG_TMPFS=y +CONFIG_CONFIGFS_FS=y +CONFIG_SQUASHFS=y +CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y +CONFIG_SQUASHFS_XZ=y +CONFIG_SQUASHFS_4K_DEVBLK_SIZE=y +CONFIG_PSTORE=y +CONFIG_PSTORE_CONSOLE=y +CONFIG_PSTORE_RAM=y +CONFIG_NFS_FS=m +CONFIG_NFSD=m +CONFIG_CIFS=m +CONFIG_CIFS_XATTR=y +CONFIG_SMB_SERVER=m +CONFIG_NLS_DEFAULT="utf8" +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_936=y +CONFIG_NLS_ASCII=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NLS_UTF8=y +CONFIG_PERSISTENT_KEYRINGS=y +CONFIG_ENCRYPTED_KEYS=y +CONFIG_KEY_DH_OPERATIONS=y +CONFIG_CRYPTO_ECDH=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_DEV_ROCKCHIP=y +CONFIG_CRYPTO_DEV_ROCKCHIP_DEV=y +CONFIG_PRINTK_TIME=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_DEBUG_INFO_DWARF5=y +CONFIG_DEBUG_INFO_BTF=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0 +CONFIG_DEBUG_FS=y +# CONFIG_SLUB_DEBUG is not set +CONFIG_PANIC_ON_OOPS=y +CONFIG_PANIC_TIMEOUT=5 +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y +CONFIG_HARDLOCKUP_DETECTOR=y +CONFIG_BOOTPARAM_HARDLOCKUP_PANIC=y +# CONFIG_DETECT_HUNG_TASK is not set +# CONFIG_SCHED_DEBUG is not set +CONFIG_PROVE_LOCKING=y +CONFIG_PROVE_RAW_LOCK_NESTING=y +CONFIG_DEBUG_LOCKDEP=y +CONFIG_DEBUG_ATOMIC_SLEEP=y +CONFIG_RCU_CPU_STALL_TIMEOUT=60 +CONFIG_FUNCTION_TRACER=y +CONFIG_FTRACE_SYSCALLS=y diff --git a/patch/kernel/rockchip64-vendor-6.1/0000.patching_config.yaml b/patch/kernel/rockchip64-vendor-6.1/0000.patching_config.yaml new file mode 100644 index 000000000000..e073210477d6 --- /dev/null +++ b/patch/kernel/rockchip64-vendor-6.1/0000.patching_config.yaml @@ -0,0 +1,30 @@ +config: + + # Just some info stuff; not used by the patching scripts + name: rockchip64-6.1 + kind: kernel + type: vendor # or: vendor + branch: rk-6.1-rkr5.1 + last-known-good-tag: v6.1.99 + + # .dts files in these directories will be copied as-is to the build tree; later ones overwrite earlier ones. + # This is meant to provide a way to "add a board DTS" without having to null-patch them in. + dts-directories: + - { source: "dt", target: "arch/arm64/boot/dts/rockchip" } + + # the Makefile in each of these directories will be magically patched to include the dts files copied + # or patched-in; overlay subdir will be included "-y" if it exists. + # No more Makefile patching needed, yay! + # "incremental: true" changes the logic of the Makefile re-writing to only add the + # dts-directories's *.dts files to existing Makefile instead of + # full rewrite from *.dts in the dt dir at the end of patching. + auto-patch-dt-makefile: + - { incremental: true, directory: "arch/arm64/boot/dts/rockchip", config-var: "CONFIG_ARCH_ROCKCHIP" } + + # configuration for when applying patches to git / auto-rewriting patches (development cycle helpers) + patches-to-git: + do-not-commit-files: + - "MAINTAINERS" # constant churn, drop them. sorry. + - "Documentation/devicetree/bindings/arm/rockchip.yaml" # constant churn, conflicts on every bump, drop it. sorry. + do-not-commit-regexes: # Python-style regexes + - "^arch/([a-zA-Z0-9]+)/boot/dts/([a-zA-Z0-9]+)/Makefile$" # ignore DT Makefile patches, we've an auto-patcher now diff --git a/patch/kernel/rockchip64-vendor-6.1/aic8800-select-rk-platform.patch b/patch/kernel/rockchip64-vendor-6.1/aic8800-select-rk-platform.patch new file mode 100644 index 000000000000..46eb3ff68a45 --- /dev/null +++ b/patch/kernel/rockchip64-vendor-6.1/aic8800-select-rk-platform.patch @@ -0,0 +1,808 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: nikvoid +Date: Wed, 11 Jun 2025 01:02:05 +0300 +Subject: Enable in-tree AIC8800 driver and remove defines for platforms other than rockchip +--- + +diff --git a/drivers/net/wireless/Makefile b/drivers/net/wireless/Makefile +index 0ab794204a33..55665d041f01 100644 +--- a/drivers/net/wireless/Makefile ++++ b/drivers/net/wireless/Makefile +@@ -41,5 +41,6 @@ obj-$(CONFIG_88XXAU) += rtl8812au/ + obj-$(CONFIG_RTL8821CU) += rtl8811cu/ + obj-$(CONFIG_RTL8822BU) += rtl88x2bu/ + obj-$(CONFIG_RTL8723DS) += rtl8723ds/ + obj-$(CONFIG_RTL8723DU) += rtl8723du/ + obj-$(CONFIG_SPARD_WLAN_SUPPORT) += uwe5622/ ++obj-$(CONFIG_AIC_WLAN_SUPPORT) += aic8800_sdio/ +diff --git a/drivers/net/wireless/aic8800_sdio/aic8800_bsp/Makefile b/drivers/net/wireless/aic8800_sdio/aic8800_bsp/Makefile +index 83d382700b59..7600cbe13da0 100644 +--- a/drivers/net/wireless/aic8800_sdio/aic8800_bsp/Makefile ++++ b/drivers/net/wireless/aic8800_sdio/aic8800_bsp/Makefile +@@ -25,10 +25,11 @@ CONFIG_DPD = y + CONFIG_FORCE_DPD_CALIB = y + CONFIG_RESV_MEM_SUPPORT = y + CONFIG_AMSDU_RX ?=n + CONFIG_IRQ_FALL ?= n + ++ccflags-$(CONFIG_PLATFORM_ROCKCHIP) += -DCONFIG_PLATFORM_ROCKCHIP + ccflags-$(CONFIG_GPIO_WAKEUP) += -DCONFIG_GPIO_WAKEUP + ccflags-$(CONFIG_M2D_OTA_AUTO_SUPPORT) += -DCONFIG_M2D_OTA_AUTO_SUPPORT + ccflags-$(CONFIG_M2D_OTA_LZMA_SUPPORT) += -DCONFIG_M2D_OTA_LZMA_SUPPORT + ccflags-$(CONFIG_LINK_DET_5G) += -DCONFIG_LINK_DET_5G + ccflags-$(CONFIG_MCU_MESSAGE) += -DCONFIG_MCU_MESSAGE +diff --git a/drivers/net/wireless/aic8800_sdio/aic8800_bsp/aic_bsp_main.c b/drivers/net/wireless/aic8800_sdio/aic8800_bsp/aic_bsp_main.c +index 6177911a318c..29d53ec60fa0 100644 +--- a/drivers/net/wireless/aic8800_sdio/aic8800_bsp/aic_bsp_main.c ++++ b/drivers/net/wireless/aic8800_sdio/aic8800_bsp/aic_bsp_main.c +@@ -345,26 +345,22 @@ static int __init aicbsp_init(void) + pr_err("register sysfs create group failed!\n"); + return ret; + } + + mutex_init(&aicbsp_power_lock); +-#ifdef CONFIG_PLATFORM_ROCKCHIP + aicbsp_set_subsys(AIC_BLUETOOTH, AIC_PWR_ON); +-#endif + return 0; + } + + void aicbsp_sdio_exit(void); + extern struct aic_sdio_dev *aicbsp_sdiodev; + + static void __exit aicbsp_exit(void) + { +-#ifdef CONFIG_PLATFORM_ROCKCHIP + if(aicbsp_sdiodev){ + aicbsp_sdio_exit(); + } +-#endif + sysfs_remove_group(&(aicbsp_pdev->dev.kobj), &aicbsp_attribute_group); + platform_device_del(aicbsp_pdev); + platform_driver_unregister(&aicbsp_driver); + mutex_destroy(&aicbsp_power_lock); + aicbsp_resv_mem_deinit(); +diff --git a/drivers/net/wireless/aic8800_sdio/aic8800_bsp/aicsdio.c b/drivers/net/wireless/aic8800_sdio/aic8800_bsp/aicsdio.c +index b95e754fe8db..d11bac7d0751 100644 +--- a/drivers/net/wireless/aic8800_sdio/aic8800_bsp/aicsdio.c ++++ b/drivers/net/wireless/aic8800_sdio/aic8800_bsp/aicsdio.c +@@ -18,32 +18,11 @@ + #include "aicsdio_txrxif.h" + #include "aicsdio.h" + #include "aic_bsp_driver.h" + #include + #include +-#ifdef CONFIG_PLATFORM_ROCKCHIP + #include +-#endif /* CONFIG_PLATFORM_ROCKCHIP */ +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 +-#include +-#endif /* CONFIG_PLATFORM_ROCKCHIP */ +- +- +-#ifdef CONFIG_PLATFORM_ALLWINNER +-extern void sunxi_mmc_rescan_card(unsigned ids); +-extern void sunxi_wlan_set_power(int on); +-extern int sunxi_wlan_get_bus_index(void); +-static int aicbsp_bus_index = -1; +-#endif +- +-#ifdef CONFIG_PLATFORM_AMLOGIC//for AML +-#include +-extern void sdio_reinit(void); +-extern void extern_wifi_set_enable(int is_on); +-extern void set_power_control_lock(int lock); +-#endif//for AML +- + + static int aicbsp_platform_power_on(void); + static void aicbsp_platform_power_off(void); + + struct aic_sdio_dev *aicbsp_sdiodev = NULL; +@@ -51,15 +30,11 @@ static struct semaphore *aicbsp_notify_semaphore; + static const struct sdio_device_id aicbsp_sdmmc_ids[]; + static bool aicbsp_load_fw_in_fdrv = false; + + #define FW_PATH_MAX 200 + +-//#ifdef CONFIG_PLATFORM_UBUNTU +-//static const char* aic_default_fw_path = "/lib/firmware/aic8800_sdio"; +-//#else + static const char* aic_default_fw_path = CONFIG_AIC_FW_PATH; +-//#endif + char aic_fw_path[FW_PATH_MAX]; + module_param_string(aic_fw_path, aic_fw_path, FW_PATH_MAX, 0660); + #ifdef CONFIG_M2D_OTA_AUTO_SUPPORT + char saved_sdk_ver[64]; + module_param_string(saved_sdk_ver, saved_sdk_ver,64, 0660); +@@ -136,21 +111,13 @@ static const char *aicbsp_subsys_name(int subsys) + default: + return "unknown subsys"; + } + } + +-#ifdef CONFIG_PLATFORM_ROCKCHIP +-#if 1//FOR RK SUSPEND +-void rfkill_rk_sleep_bt(bool sleep); +-#endif +-#endif +- +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 + #if 1//FOR RK SUSPEND + void rfkill_rk_sleep_bt(bool sleep); + #endif +-#endif + + int aicbsp_set_subsys(int subsys, int state) + { + static int pre_power_map; + int cur_power_map; +@@ -181,25 +148,16 @@ int aicbsp_set_subsys(int subsys, int state) + goto err2; + #ifndef CONFIG_FDRV_NO_REG_SDIO + aicbsp_sdio_release(aicbsp_sdiodev); + #endif + +-#if defined CONFIG_PLATFORM_ROCKCHIP || defined CONFIG_PLATFORM_ROCKCHIP2 + #ifdef CONFIG_GPIO_WAKEUP + //BT_SLEEP:true,BT_WAKEUP:false + rfkill_rk_sleep_bt(true); + printk("%s BT wake default to SLEEP\r\n", __func__); + #endif +-#endif +- +-//#ifndef CONFIG_PLATFORM_ROCKCHIP +-// aicbsp_sdio_exit(); +-//#endif + } else { +- #ifndef CONFIG_PLATFORM_ROCKCHIP +- aicbsp_sdio_exit(); +- #endif + aicbsp_platform_power_off(); + } + } else { + sdio_dbg("%s, power state no need to change, current: %d\n", __func__, cur_power_state); + } +@@ -386,22 +344,13 @@ static int aicbsp_sdio_suspend(struct device *dev) + { + struct sdio_func *func = dev_to_sdio_func(dev); + int err; + mmc_pm_flag_t sdio_flags; + +-#ifdef CONFIG_PLATFORM_ROCKCHIP + #ifdef CONFIG_GPIO_WAKEUP + //BT_SLEEP:true,BT_WAKEUP:false + rfkill_rk_sleep_bt(false); +-#endif +-#endif +- +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 +-#ifdef CONFIG_GPIO_WAKEUP +- //BT_SLEEP:true,BT_WAKEUP:false +- rfkill_rk_sleep_bt(false); +-#endif + #endif + + sdio_dbg("%s, func->num = %d\n", __func__, func->num); + if (func->num != 2) + return 0; +@@ -417,26 +366,15 @@ static int aicbsp_sdio_suspend(struct device *dev) + if (err) { + sdio_dbg("%s: error while trying to keep power\n", __func__); + return err; + } + +-#ifdef CONFIG_PLATFORM_ROCKCHIP + #ifdef CONFIG_GPIO_WAKEUP + //BT_SLEEP:true,BT_WAKEUP:false + rfkill_rk_sleep_bt(true); + printk("%s BT wake to SLEEP\r\n", __func__); + #endif +-#endif +- +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 +-#ifdef CONFIG_GPIO_WAKEUP +- //BT_SLEEP:true,BT_WAKEUP:false +- rfkill_rk_sleep_bt(true); +- printk("%s BT wake to SLEEP\r\n", __func__); +-#endif +-#endif +- + + return 0; + } + + static int aicbsp_sdio_resume(struct device *dev) +@@ -471,111 +409,60 @@ static int aicbsp_platform_power_on(void) + { + int ret = 0; + struct semaphore aic_chipup_sem; + sdio_dbg("%s\n", __func__); + +-#ifdef CONFIG_PLATFORM_ALLWINNER +- if (aicbsp_bus_index < 0) +- aicbsp_bus_index = sunxi_wlan_get_bus_index(); +- if (aicbsp_bus_index < 0) +- return aicbsp_bus_index; +-#endif //CONFIG_PLATFORM_ALLWINNER +- +-#ifdef CONFIG_PLATFORM_AMLOGIC +- extern_wifi_set_enable(0); +- mdelay(200); +- extern_wifi_set_enable(1); +- mdelay(200); +- sdio_reinit(); +- set_power_control_lock(1); +-#endif +- +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 +- rockchip_wifi_power(0); +- mdelay(50); +- rockchip_wifi_power(1); +- mdelay(50); +- rockchip_wifi_set_carddetect(1); +-#endif /*CONFIG_PLATFORM_ROCKCHIP2*/ ++ rockchip_wifi_power(0); ++ mdelay(50); ++ rockchip_wifi_power(1); ++ mdelay(50); ++ rockchip_wifi_set_carddetect(1); + + sema_init(&aic_chipup_sem, 0); + ret = aicbsp_reg_sdio_notify(&aic_chipup_sem); + if (ret) { + sdio_dbg("%s aicbsp_reg_sdio_notify fail(%d)\n", __func__, ret); + return ret; + } + +-#ifdef CONFIG_PLATFORM_ALLWINNER +- sunxi_wlan_set_power(0); +- mdelay(50); +- sunxi_wlan_set_power(1); +- mdelay(50); +- sunxi_mmc_rescan_card(aicbsp_bus_index); +-#endif //CONFIG_PLATFORM_ALLWINNER +- + if (down_timeout(&aic_chipup_sem, msecs_to_jiffies(2000)) == 0) { + aicbsp_unreg_sdio_notify(); + if(aicbsp_load_fw_in_fdrv){ + printk("%s load fw in fdrv\r\n", __func__); + return -1; + } + return 0; + } + + aicbsp_unreg_sdio_notify(); +-#ifdef CONFIG_PLATFORM_ALLWINNER +- sunxi_wlan_set_power(0); +-#endif //CONFIG_PLATFORM_ALLWINNER +- +-#ifdef CONFIG_PLATFORM_AMLOGIC +- extern_wifi_set_enable(0); +-#endif + +- +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 + rockchip_wifi_power(0); +-#endif /*CONFIG_PLATFORM_ROCKCHIP2*/ + + return -1; + } + + static void aicbsp_platform_power_off(void) + { + //TODO wifi disable and sdio card detection +-#ifdef CONFIG_PLATFORM_ALLWINNER +- if (aicbsp_bus_index < 0) +- aicbsp_bus_index = sunxi_wlan_get_bus_index(); +- if (aicbsp_bus_index < 0) { +- sdio_dbg("no aicbsp_bus_index\n"); +- return; +- } +- sunxi_wlan_set_power(0); +- mdelay(100); +- sunxi_mmc_rescan_card(aicbsp_bus_index); +-#endif //CONFIG_PLATFORM_ALLWINNER + +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 + rockchip_wifi_set_carddetect(0); + mdelay(200); + rockchip_wifi_power(0); + mdelay(200); +-#endif /*CONFIG_PLATFORM_ROCKCHIP*/ +-#ifdef CONFIG_PLATFORM_AMLOGIC +- extern_wifi_set_enable(0); +-#endif +- + + sdio_dbg("%s\n", __func__); + } + +- + int aicbsp_sdio_init(void) + { + if (sdio_register_driver(&aicbsp_sdio_driver)) { + return -1; + } else { +- //may add mmc_rescan here ++ // // Force MMC rescan ++ // rockchip_wifi_power(1); ++ // mdelay(100); ++ // rockchip_wifi_set_carddetect(1); + } + return 0; + } + + void aicbsp_sdio_exit(void) +@@ -1433,13 +1320,11 @@ void aicwf_sdio_hal_irqhandler(struct sdio_func *func) + aicwf_sdio_intr_get_len_bytemode(sdiodev, &byte_len);//byte_len must<= 128 + sdio_info("byte mode len=%d\r\n", byte_len); + pkt = aicwf_sdio_readframes(sdiodev, 0); + } + } else { +- #ifndef CONFIG_PLATFORM_ALLWINNER + sdio_err("Interrupt but no data\n"); +- #endif + } + + if (pkt) + aicwf_sdio_enq_rxpkt(sdiodev, pkt); + +@@ -1488,13 +1373,11 @@ void aicwf_sdio_hal_irqhandler(struct sdio_func *func) + sdiodev->rx_priv->data_len = (intstatus & 0x7FU) * SDIOWIFI_FUNC_BLOCKSIZE; + pkt = aicwf_sdio_readframes(sdiodev, 0); + } + } + } else { +- #ifndef CONFIG_PLATFORM_ALLWINNER + sdio_err("Interrupt but no data\n"); +- #endif + } + + if (pkt) + aicwf_sdio_enq_rxpkt(sdiodev, pkt); + } +@@ -1539,13 +1422,11 @@ void aicwf_sdio_hal_irqhandler_func2(struct sdio_func *func) + + aicwf_sdio_intr_get_len_bytemode(sdiodev, &byte_len);//byte_len must<= 128 + pkt = aicwf_sdio_readframes(sdiodev,1); + } + } else { +- #ifndef CONFIG_PLATFORM_ALLWINNER + sdio_err("Interrupt but no data\n"); +- #endif + } + + if (pkt){ + aicwf_sdio_enq_rxpkt(sdiodev, pkt); + } +diff --git a/drivers/net/wireless/aic8800_sdio/aic8800_btlpm/Makefile b/drivers/net/wireless/aic8800_sdio/aic8800_btlpm/Makefile +index 4fe8fa91bf02..82b5c9c7009f 100644 +--- a/drivers/net/wireless/aic8800_sdio/aic8800_btlpm/Makefile ++++ b/drivers/net/wireless/aic8800_sdio/aic8800_btlpm/Makefile +@@ -3,18 +3,18 @@ CONFIG_AIC8800_BTLPM_SUPPORT = m + obj-$(CONFIG_AIC8800_BTLPM_SUPPORT) := aic8800_btlpm.o + + ccflags-y += -I$(srctree)/$(src)/../aic8800_bsp + + # Platform support list +-CONFIG_PLATFORM_ROCKCHIP ?= n ++CONFIG_PLATFORM_ROCKCHIP ?= y + CONFIG_PLATFORM_ROCKCHIP2 ?= n + CONFIG_PLATFORM_ALLWINNER ?= n + CONFIG_PLATFORM_AMLOGIC ?= n +-CONFIG_PLATFORM_UBUNTU ?= y ++CONFIG_PLATFORM_UBUNTU ?= n + + +-CONFIG_SUPPORT_LPM = y ++CONFIG_SUPPORT_LPM = n + CONFIG_AUTO_PM ?= n + + aic8800_btlpm-y := \ + aic_bluetooth_main.o \ + rfkill.o \ +diff --git a/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/Makefile b/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/Makefile +index d9fb44b3b319..3c0f9b5a94a9 100644 +--- a/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/Makefile ++++ b/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/Makefile +@@ -198,10 +198,11 @@ ccflags-$(CONFIG_RWNX_SDM) += -DCONFIG_RWNX_SDM + ccflags-$(CONFIG_RWNX_TL4) += -DCONFIG_RWNX_TL4 + ccflags-$(CONFIG_RWNX_OLD_IPC) += -DCONFIG_RWNX_OLD_IPC + ccflags-$(CONFIG_PLATFORM_NANOPI_M4) += -DCONFIG_NANOPI_M4 + ccflags-$(CONFIG_PLATFORM_INGENIC_T20) += -DCONFIG_INGENIC_T20 + ccflags-$(CONFIG_PLATFORM_ALLWINNER) += -DCONFIG_PLATFORM_ALLWINNER ++ccflags-$(CONFIG_PLATFORM_ROCKCHIP) += -DCONFIG_PLATFORM_ROCKCHIP + ccflags-$(CONFIG_START_FROM_BOOTROM) += -DCONFIG_START_FROM_BOOTROM + ccflags-$(CONFIG_PMIC_SETTING) += -DCONFIG_PMIC_SETTING + ccflags-$(CONFIG_VRF_DCDC_MODE) += -DCONFIG_VRF_DCDC_MODE + ccflags-$(CONFIG_ROM_PATCH_EN) += -DCONFIG_ROM_PATCH_EN + ccflags-$(CONFIG_HE_FOR_OLD_KERNEL) += -DCONFIG_HE_FOR_OLD_KERNEL +diff --git a/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/aicwf_sdio.c b/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/aicwf_sdio.c +index 53c9710dd690..94fbc5acd787 100644 +--- a/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/aicwf_sdio.c ++++ b/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/aicwf_sdio.c +@@ -26,19 +26,11 @@ + #else + #include + #endif + #include "rwnx_wakelock.h" + +-#ifdef CONFIG_INGENIC_T20 +-#include "mach/jzmmc.h" +-#endif /* CONFIG_INGENIC_T20 */ +-#ifdef CONFIG_PLATFORM_ROCKCHIP + #include +-#endif +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 +-#include +-#endif + + #include "aic_bsp_export.h" + extern uint8_t scanning; + + #ifdef CONFIG_GPIO_WAKEUP +@@ -236,19 +228,10 @@ static struct wake_lock irq_wakelock; + //struct wake_lock irq_wakelock; + #endif//CONFIG_GPIO_WAKEUP + #endif//ANDROID_PLATFORM + #endif + +-#ifdef CONFIG_PLATFORM_ALLWINNER +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0) +-extern int sunxi_wlan_get_oob_irq(int *, int *); +-#else +-extern int sunxi_wlan_get_oob_irq(void); +-extern int sunxi_wlan_get_oob_irq_flags(void); +-#endif +-#endif// CONFIG_PLATFORM_ALLWINNER +- + #if 0 + #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0) + static struct wakeup_source *ws; + #else + #ifdef ANDROID_PLATFORM +@@ -360,38 +343,15 @@ static int rwnx_register_hostwake_irq(struct device *dev) + flag_edge = IRQF_TRIGGER_RISING | IRQF_NO_SUSPEND; + else + flag_edge = IRQF_TRIGGER_FALLING | IRQF_NO_SUSPEND; + + +-#ifdef CONFIG_PLATFORM_ALLWINNER +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0) +- hostwake_irq_num = sunxi_wlan_get_oob_irq(&irq_flags, &wakeup_enable); +-#else +- hostwake_irq_num = sunxi_wlan_get_oob_irq(); +- irq_flags = sunxi_wlan_get_oob_irq_flags(); ++ hostwake_irq_num = rockchip_wifi_get_oob_irq(); ++ printk("%s hostwake_irq_num:%d \r\n", __func__, hostwake_irq_num); ++ irq_flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL | IORESOURCE_IRQ_SHAREABLE) & IRQF_TRIGGER_MASK; ++ printk("%s irq_flags:%d \r\n", __func__, irq_flags); + wakeup_enable = 1; +-#endif +-#endif //CONFIG_PLATFORM_ALLWINNER +- +-//For Rockchip +-#ifdef CONFIG_PLATFORM_ROCKCHIP +- hostwake_irq_num = rockchip_wifi_get_oob_irq(); +- printk("%s hostwake_irq_num:%d \r\n", __func__, hostwake_irq_num); +- irq_flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL | IORESOURCE_IRQ_SHAREABLE) & IRQF_TRIGGER_MASK; +- printk("%s irq_flags:%d \r\n", __func__, irq_flags); +- wakeup_enable = 1; +-#endif //CONFIG_PLATFORM_ROCKCHIP +- //For Rockchip +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 +- hostwake_irq_num = rockchip_wifi_get_oob_irq(); +- printk("%s hostwake_irq_num:%d \r\n", __func__, hostwake_irq_num); +- irq_flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL | IORESOURCE_IRQ_SHAREABLE) & IRQF_TRIGGER_MASK; +- printk("%s irq_flags:%d \r\n", __func__, irq_flags); +- wakeup_enable = 1; +-#endif //CONFIG_PLATFORM_ROCKCHIP +- +- + + if (wakeup_enable) { + #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 0) + //ws = wakeup_source_register(dev, "wifisleep"); + //ws_tx_sdio = wakeup_source_register(dev, "wifi_tx_sleep"); +@@ -717,12 +677,10 @@ static int aicwf_sdio_suspend(struct device *dev) + } + #ifdef CONFIG_GPIO_WAKEUP + // rwnx_enable_hostwake_irq(); + #endif + +- +-#if defined(CONFIG_PLATFORM_ROCKCHIP) || defined(CONFIG_PLATFORM_ROCKCHIP2) + if(sdiodev->chipid == PRODUCT_ID_AIC8801){ + sdio_dbg("%s SDIOWIFI_INTR_CONFIG_REG Disable\n", __func__); + sdio_claim_host(sdiodev->func); + //disable sdio interrupt + ret = aicwf_sdio_writeb(sdiodev, SDIOWIFI_INTR_CONFIG_REG, 0x0); +@@ -730,11 +688,10 @@ static int aicwf_sdio_suspend(struct device *dev) + sdio_err("reg:%d write failed!\n", SDIOWIFI_INTR_CONFIG_REG); + } + sdio_release_irq(sdiodev->func); + sdio_release_host(sdiodev->func); + } +-#endif + atomic_set(&sdiodev->is_bus_suspend, 1); + // smp_mb(); + + sdio_dbg("%s exit\n", __func__); + +@@ -744,13 +701,11 @@ static int aicwf_sdio_suspend(struct device *dev) + static int aicwf_sdio_resume(struct device *dev) + { + struct aicwf_bus *bus_if = dev_get_drvdata(dev); + struct aic_sdio_dev *sdiodev = bus_if->bus_priv.sdio; + struct rwnx_vif *rwnx_vif, *tmp; +-#if defined(CONFIG_PLATFORM_ROCKCHIP) || defined(CONFIG_PLATFORM_ROCKCHIP2) + int ret; +-#endif + + sdio_dbg("%s enter \n", __func__); + //#ifdef CONFIG_GPIO_WAKEUP + // rwnx_disable_hostwake_irq(); + //#endif +@@ -769,11 +724,10 @@ static int aicwf_sdio_resume(struct device *dev) + #endif//CONFIG_WIFI_SUSPEND_FOR_LINUX + + + // aicwf_sdio_hal_irqhandler(sdiodev->func); + +-#if defined(CONFIG_PLATFORM_ROCKCHIP) || defined(CONFIG_PLATFORM_ROCKCHIP2) + if(sdiodev->chipid == PRODUCT_ID_AIC8801){ + sdio_dbg("%s SDIOWIFI_INTR_CONFIG_REG Enable\n", __func__); + sdio_claim_host(sdiodev->func); + sdio_claim_irq(sdiodev->func, aicwf_sdio_hal_irqhandler); + +@@ -781,11 +735,10 @@ static int aicwf_sdio_resume(struct device *dev) + ret = aicwf_sdio_writeb(sdiodev, SDIOWIFI_INTR_CONFIG_REG, 0x07); + if (ret != 0) + sdio_err("intr register failed:%d\n", ret); + sdio_release_host(sdiodev->func); + } +-#endif + atomic_set(&sdiodev->is_bus_suspend, 0); + // smp_mb(); + + sdio_dbg("%s exit\n", __func__); + return 0; +@@ -814,61 +767,26 @@ static struct sdio_driver aicwf_sdio_driver = { + .pm = &aicwf_sdio_pm_ops, + }, + }; + #endif + +-#if 0 +-#ifdef CONFIG_NANOPI_M4 +-extern int mmc_rescan_try_freq(struct mmc_host *host, unsigned freq); +-extern unsigned aic_max_freqs; +-extern struct mmc_host *aic_host_drv; +-extern int __mmc_claim_host(struct mmc_host *host, atomic_t *abort); +-extern void mmc_release_host(struct mmc_host *host); +-#endif +-#endif +- + #ifdef CONFIG_FDRV_NO_REG_SDIO + extern struct sdio_func *get_sdio_func(void); + void aicwf_sdio_probe_(struct sdio_func *func, const struct sdio_device_id *id); + void aicwf_sdio_remove_(struct sdio_func *func); + #endif + + void aicwf_sdio_register(void) + { + #if 0 +-#ifdef CONFIG_PLATFORM_NANOPI +- extern_wifi_set_enable(0); +- mdelay(200); +- extern_wifi_set_enable(1); +- mdelay(200); +- sdio_reinit(); +-#endif /*CONFIG_PLATFORM_NANOPI*/ +- +-#ifdef CONFIG_PLATFORM_ROCKCHIP + rockchip_wifi_power(0); + mdelay(200); + rockchip_wifi_power(1); + mdelay(200); + rockchip_wifi_set_carddetect(1); +-#endif /*CONFIG_PLATFORM_ROCKCHIP*/ +- +-#ifdef CONFIG_INGENIC_T20 +- jzmmc_manual_detect(1, 1); +-#endif /* CONFIG_INGENIC_T20 */ +- +- +-#ifdef CONFIG_NANOPI_M4 +- if (aic_host_drv->card == NULL) { +- __mmc_claim_host(aic_host_drv, NULL); +- printk("aic: >>>mmc_rescan_try_freq\n"); +- mmc_rescan_try_freq(aic_host_drv, aic_max_freqs); +- mmc_release_host(aic_host_drv); +- } +-#endif + #endif + +- + #ifndef CONFIG_FDRV_NO_REG_SDIO + if (sdio_register_driver(&aicwf_sdio_driver)) { + + } else { + //may add mmc_rescan here +@@ -893,22 +811,14 @@ void aicwf_sdio_exit(void) + #else + aicwf_sdio_remove_(get_sdio_func()); + #endif + + #if 0 +-#ifdef CONFIG_PLATFORM_AMLOGIC +- extern_wifi_set_enable(0); +-#endif /*CONFIG_PLATFORM_AMLOGIC*/ +-#endif +- +-#if 0 +-#ifdef CONFIG_PLATFORM_ROCKCHIP + rockchip_wifi_set_carddetect(0); + mdelay(200); + rockchip_wifi_power(0); + mdelay(200); +-#endif /*CONFIG_PLATFORM_ROCKCHIP*/ + #endif + + if(g_rwnx_plat){ + kfree(g_rwnx_plat); + } +@@ -1970,13 +1880,11 @@ void aicwf_sdio_hal_irqhandler(struct sdio_func *func) + aicwf_sdio_intr_get_len_bytemode(sdiodev, &byte_len);//byte_len must<= 128 + sdio_info("byte mode len=%d\r\n", byte_len); + pkt = aicwf_sdio_readframes(sdiodev); + } + } else { +- #ifndef CONFIG_PLATFORM_ALLWINNER +- // sdio_err("Interrupt but no data\n"); +- #endif ++ // sdio_err("Interrupt but no data\n"); + } + + if (pkt) + aicwf_sdio_enq_rxpkt(sdiodev, pkt); + +@@ -2031,13 +1939,11 @@ void aicwf_sdio_hal_irqhandler(struct sdio_func *func) + //pkt = aicwf_sdio_readframes(sdiodev, 0); + pkt = aicwf_sdio_readframes(sdiodev); + } + } + } else { +- #ifndef CONFIG_PLATFORM_ALLWINNER + //sdio_err("Interrupt but no data\n"); +- #endif + } + + if (pkt) + aicwf_sdio_enq_rxpkt(sdiodev, pkt); + +diff --git a/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/rwnx_main.c b/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/rwnx_main.c +index 29f86da75258..4e47dea0274c 100644 +--- a/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/rwnx_main.c ++++ b/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/rwnx_main.c +@@ -6677,51 +6677,17 @@ int rwnx_ic_rf_init(struct rwnx_hw *rwnx_hw){ + } + return 0; + } + + +-#ifdef CONFIG_PLATFORM_ALLWINNER +-#ifdef CONFIG_USE_CUSTOMER_MAC +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0) +-extern int get_custom_mac_address(int fmt, char *name, char *addr); +-#else +-extern int get_wifi_custom_mac_address(char *addr_str); +-#endif +-#endif//CONFIG_USE_CUSTOMER_MAC +-#endif//CONFIG_PLATFORM_ALLWINNER +- +-#ifdef CONFIG_PLATFORM_ROCKCHIP +-#include +-#endif +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 + #include +-#endif + + #ifdef CONFIG_USE_CUSTOMER_MAC + int rwnx_get_custom_mac_addr(u8_l *mac_addr_efuse){ + int ret = 0; + +-#ifdef CONFIG_PLATFORM_ALLWINNER +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0) +- ret = get_custom_mac_address(1, "wifi", mac_addr_efuse); +-#else +- ret = get_wifi_custom_mac_address(addr_str); +- if (ret >= 0) { +- sscanf(addr_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", +- &mac_addr_efuse[0], &mac_addr_efuse[1], &mac_addr_efuse[2], +- &mac_addr_efuse[3], &mac_addr_efuse[4], &mac_addr_efuse[5]); +- } +-#endif +- +-#endif//CONFIG_PLATFORM_ALLWINNER +- +-#ifdef CONFIG_PLATFORM_ROCKCHIP + ret = rockchip_wifi_mac_addr(mac_addr_efuse); +-#endif//CONFIG_PLATFORM_ROCKCHIP +-#ifdef CONFIG_PLATFORM_ROCKCHIP2 +- ret = rockchip_wifi_mac_addr(mac_addr_efuse); +-#endif//CONFIG_PLATFORM_ROCKCHIP + + if(ret == 0){ + AICWFDBG(LOGINFO, "%s %02x:%02x:%02x:%02x:%02x:%02x", __func__, + mac_addr_efuse[0], mac_addr_efuse[1], mac_addr_efuse[2], + mac_addr_efuse[3], mac_addr_efuse[4], mac_addr_efuse[5]); +@@ -7229,18 +7195,16 @@ static int __init rwnx_mod_init(void) + { + RWNX_DBG(RWNX_FN_ENTRY_STR); + rwnx_print_version(); + rwnx_init_cmd_array(); + +-//#ifndef CONFIG_PLATFORM_ROCKCHIP + if (aicbsp_set_subsys(AIC_WIFI, AIC_PWR_ON) < 0) { + AICWFDBG(LOGERROR, "%s, set power on fail!\n", __func__); + if(!aicbsp_get_load_fw_in_fdrv()){ + return -ENODEV; + } + } +-//#endif + + init_completion(&hostif_register_done); + aicsmac_driver_register(); + + if ((wait_for_completion_timeout(&hostif_register_done, msecs_to_jiffies(REGISTRATION_TIMEOUT)) == 0) || rwnx_driver_err) { +@@ -7278,13 +7242,11 @@ static void __exit rwnx_mod_exit(void) + #endif + + #ifdef AICWF_USB_SUPPORT + aicwf_usb_exit(); + #endif +-//#ifndef CONFIG_PLATFORM_ROCKCHIP + aicbsp_set_subsys(AIC_WIFI, AIC_PWR_OFF); +-//#endif + rwnx_free_cmd_array(); + + } + + +diff --git a/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/rwnx_wakelock.c b/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/rwnx_wakelock.c +index 69bcf3f5d784..2b957f70c958 100644 +--- a/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/rwnx_wakelock.c ++++ b/drivers/net/wireless/aic8800_sdio/aic8800_fdrv/rwnx_wakelock.c +@@ -25,27 +25,11 @@ void rwnx_wakeup_deinit(struct wakeup_source *ws) + wakeup_source_destroy(ws); + } + + struct wakeup_source *rwnx_wakeup_register(struct device *dev, const char *name) + { +- +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0) + return wakeup_source_register(dev, name); +-#else +- +-#if defined(CONFIG_PLATFORM_ROCKCHIP2) || defined(CONFIG_PLATFORM_ROCKCHIP) +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0) +- return wakeup_source_register(dev, name); +-#else +- return wakeup_source_register(name); +-#endif +- +-#else +- return wakeup_source_register(name); +-#endif//#if defined(CONFIG_PLATFORM_ROCKCHIP2) || defined(CONFIG_PLATFORM_ROCKCHIP) +- +-#endif//LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0) + } + + void rwnx_wakeup_unregister(struct wakeup_source *ws) + { + if (ws && ws->active) +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/kernel/rockchip64-vendor-6.1/dt/rk3308-luckfox-nova-w.dts b/patch/kernel/rockchip64-vendor-6.1/dt/rk3308-luckfox-nova-w.dts new file mode 100755 index 000000000000..97c8eac8032d --- /dev/null +++ b/patch/kernel/rockchip64-vendor-6.1/dt/rk3308-luckfox-nova-w.dts @@ -0,0 +1,381 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd + */ + +/dts-v1/; +#include +#include "rk3308.dtsi" + +/ { + model = "Luckfox Nova W RK3308B"; + compatible = "rockchip,rk3308b-evb-v10", "rockchip,rk3308"; + + chosen { + stdout-path = "serial4:1500000n8"; + }; + + // Blinking led near USB-C + leds: leds { + compatible = "gpio-leds"; + work_led: work { + gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + vdd_core: vdd-core { + compatible = "pwm-regulator"; + pwms = <&pwm0 0 5000 1>; + regulator-name = "vdd_core"; + regulator-min-microvolt = <827000>; + regulator-max-microvolt = <1340000>; + regulator-init-microvolt = <1015000>; + regulator-always-on; + regulator-boot-on; + regulator-settling-time-up-us = <250>; + status = "okay"; + }; + + vdd_log: vdd-log { + compatible = "regulator-fixed"; + regulator-name = "vdd_log"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + vdd_1v0: vdd-1v0 { + compatible = "regulator-fixed"; + regulator-name = "vdd_1v0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + }; + + vcc_3v3_codec: vcc_io: vcc-io { + compatible = "regulator-fixed"; + regulator-name = "vcc_io"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vccio_sdio: vcc_1v8: vcc-1v8 { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_io>; + }; + + vcc_1v8_codec: vcc-1v8-codec { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v8_codec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc_io>; + }; + + vcc_ddr: vcc-ddr { + compatible = "regulator-fixed"; + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + }; + + vccio_flash: vccio-flash { + compatible = "regulator-fixed"; + regulator-name = "vccio_flash"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vbus_host: vbus-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + regulator-always-on; + regulator-boot-on; + gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb_drv>; + regulator-name = "vbus_host"; + vin-supply = <&vcc5v0_sys>; + }; + + vccio_sd: vccio-sd { + compatible = "regulator-gpio"; + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + states = <1800000 0x0 3300000 0x1>; + }; + + vcc_sd: vcc-sd { + compatible = "regulator-fixed"; + gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_LOW>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + wireless_bluetooh: wireless-bluetooth { + compatible = "bluetooth-platdata"; + uart_rts_gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; + pinctrl-names = "default", "rts_gpio"; + pinctrl-0 = <&uart0_rts>; + pinctrl-1 = <&uart0_gpios>; + BT,power_gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; + // BT,wake_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; + // BT,wake_host_irq = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + + wireless_wlan: wireless-wlan { + compatible = "wlan-platdata"; + rockchip,grf = <&grf>; + wifi_chip_type = "AIC8800DC"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_irq>, <&wifi_enable_h>; + WIFI,host_wake_irq = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; + WIFI,poweren_gpio = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_core>; +}; + +&cpu0_opp_table { + opp-1200000000 { + status = "okay"; + }; + opp-1296000000 { + status = "okay"; + }; +}; + +&dmc { + center-supply = <&vdd_log>; + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + no-sdio; + no-sd; + disable-wp; + non-removable; + num-slots = <1>; + status = "okay"; +}; + +// &fiq_debugger { +// rockchip,serial-id = <4>; +// status = "okay"; +// }; + +&io_domains { + status = "okay"; + + vccio0-supply = <&vcc_io>; + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc_io>; + vccio3-supply = <&vccio_flash>; + vccio4-supply = <&vccio_sdio>; + vccio5-supply = <&vcc_io>; +}; + +&i2s_8ch_2 { + status = "okay"; +}; + +&mac { + phy-supply = <&vcc_phy>; + clock_in_out = "output"; + assigned-clocks = <&cru SCLK_MAC>; + snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 50000 50000>; + status = "okay"; +}; + +&nandc { + status = "okay"; +}; + +&pinctrl { + pinctrl-names = "default"; + pinctrl-0 = <&rtc_32k>; + + usb { + usb_drv: usb-drv { + rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wireless-wlan { + wifi_irq: wifi-host-wake-irq { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + wireless-bluetooth { + uart0_gpios: uart0-gpios { + rockchip,pins = <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + // bt_irq: bt-irq { + // rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; + // }; + + // bt_wake: bt-wake { + // rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>; + // }; + + bt_enable_h: bt-enable-h { + rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; +}; + +&pwm0 { + status = "okay"; + pinctrl-names = "active"; + pinctrl-0 = <&pwm0_pin_pull_down>; +}; + +&rng { + status = "okay"; +}; + +&rockchip_suspend { + rockchip,pwm-regulator-config = < + (0 + | RKPM_PWM_REGULATOR + ) + >; + + status = "okay"; +}; + +&saradc { + status = "okay"; + vref-supply = <&vcc_1v8>; +}; + +&sdmmc { + max-frequeency = <150000000>; + supports-sd; + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + num-slots = <1>; + vmmc-supply = <&vcc_sd>; + vqmmc-supply = <&vccio_sd>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; + ard-detect-delay = <800>; + status = "okay"; +}; + +&sdio { + max-frequency = <150000000>; + bus-width = <4>; + no-sd; + no-mmc; + supports-sdio; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + sd-uhs-sdr104; + pinctrl-names = "default"; + status = "okay"; +}; + +&sfc { + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <0>; /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */ + status = "okay"; +}; + +&u2phy { + status = "okay"; + + u2phy_host: host-port { + phy-supply = <&vbus_host>; + status = "okay"; + }; + + u2phy_otg: otg-port { + rockchip,typec-vbus-det; + rockchip,vbus-always-on; + status = "okay"; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_xfer &uart0_cts>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_xfer>; + status = "okay"; +}; + +&usb20_otg { + dr_mode = "peripheral"; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci{ + status = "okay"; +}; diff --git a/patch/kernel/rockchip64-vendor-6.1/qcaspi-rkspi-fix.patch b/patch/kernel/rockchip64-vendor-6.1/qcaspi-rkspi-fix.patch new file mode 100644 index 000000000000..7bfd8ef57d47 --- /dev/null +++ b/patch/kernel/rockchip64-vendor-6.1/qcaspi-rkspi-fix.patch @@ -0,0 +1,416 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: nikvoid +Date: Mon, 16 Jun 2025 13:19:58 +0300 +Subject: QCASPI fixes/workaround for rockchip SPI (quirks?) + +Improved reliabillity of probe; do SPI transactions in single read-write message +--- + drivers/net/ethernet/qualcomm/qca_7k.c | 123 ++++--- + drivers/net/ethernet/qualcomm/qca_spi.c | 162 +++++++--- + drivers/net/ethernet/qualcomm/qca_spi.h | 2 +- + 3 files changed, 171 insertions(+), 116 deletions(-) + +diff --git a/drivers/net/ethernet/qualcomm/qca_7k.c b/drivers/net/ethernet/qualcomm/qca_7k.c +index 4292c89bd35c..9fabe1c9782f 100644 +--- a/drivers/net/ethernet/qualcomm/qca_7k.c ++++ b/drivers/net/ethernet/qualcomm/qca_7k.c +@@ -38,86 +38,83 @@ qcaspi_spi_error(struct qcaspi *qca) + netdev_err(qca->net_dev, "spi error\n"); + qca->sync = QCASPI_SYNC_UNKNOWN; + qca->stats.spi_err++; + } + +-int +-qcaspi_read_register(struct qcaspi *qca, u16 reg, u16 *result) ++int qcaspi_read_register(struct qcaspi *qca, u16 reg, u16 *result) + { +- __be16 rx_data; +- __be16 tx_data; +- struct spi_transfer transfer[2]; +- struct spi_message msg; +- int ret; +- +- memset(transfer, 0, sizeof(transfer)); +- +- spi_message_init(&msg); +- +- tx_data = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_INTERNAL | reg); +- *result = 0; +- +- transfer[0].tx_buf = &tx_data; +- transfer[0].len = QCASPI_CMD_LEN; +- transfer[1].rx_buf = &rx_data; +- transfer[1].len = QCASPI_CMD_LEN; +- +- spi_message_add_tail(&transfer[0], &msg); +- +- if (qca->legacy_mode) { +- spi_sync(qca->spi_dev, &msg); +- spi_message_init(&msg); +- } +- spi_message_add_tail(&transfer[1], &msg); +- ret = spi_sync(qca->spi_dev, &msg); +- +- if (!ret) +- ret = msg.status; +- +- if (ret) +- qcaspi_spi_error(qca); +- else +- *result = be16_to_cpu(rx_data); +- +- return ret; ++ u8 tx_buf[4] = {0}; /* 4-byte transmit buffer */ ++ u8 rx_buf[4] = {0}; /* 4-byte receive buffer */ ++ struct spi_transfer transfer; ++ struct spi_message msg; ++ int ret; ++ ++ /* Initialize transfer and message */ ++ memset(&transfer, 0, sizeof(transfer)); ++ spi_message_init(&msg); ++ ++ /* Prepare 4-byte command: first 2 bytes are the read command, last 2 are dummy */ ++ __be16 tx_data = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_INTERNAL | reg); ++ memcpy(tx_buf, &tx_data, QCASPI_CMD_LEN); /* Copy 2-byte command to tx_buf */ ++ ++ /* Set up single 4-byte transfer */ ++ transfer.tx_buf = tx_buf; ++ transfer.rx_buf = rx_buf; ++ transfer.len = 4; /* Single 4-byte transfer */ ++ spi_message_add_tail(&transfer, &msg); ++ ++ /* Perform the SPI transfer */ ++ ret = spi_sync(qca->spi_dev, &msg); ++ ++ if (!ret) ++ ret = msg.status; ++ ++ if (ret) { ++ qcaspi_spi_error(qca); ++ } else { ++ /* Extract the last 2 bytes of the 4-byte response */ ++ __be16 rx_data; ++ memcpy(&rx_data, &rx_buf[2], QCASPI_CMD_LEN); ++ *result = be16_to_cpu(rx_data); ++ } ++ ++ return ret; + } + + static int + __qcaspi_write_register(struct qcaspi *qca, u16 reg, u16 value) + { +- __be16 tx_data[2]; +- struct spi_transfer transfer[2]; +- struct spi_message msg; +- int ret; +- +- memset(&transfer, 0, sizeof(transfer)); ++ u8 tx_buf[4] = {0}; /* 4-byte transmit buffer */ ++ struct spi_transfer transfer; ++ struct spi_message msg; ++ int ret; + +- spi_message_init(&msg); ++ /* Initialize transfer and message */ ++ memset(&transfer, 0, sizeof(transfer)); ++ spi_message_init(&msg); + +- tx_data[0] = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_INTERNAL | reg); +- tx_data[1] = cpu_to_be16(value); ++ /* Prepare 4-byte command: first 2 bytes are the write command, last 2 are the value */ ++ __be16 tx_data[2]; ++ tx_data[0] = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_INTERNAL | reg); ++ tx_data[1] = cpu_to_be16(value); ++ memcpy(tx_buf, tx_data, 4); /* Copy 4 bytes (command + value) to tx_buf */ + +- transfer[0].tx_buf = &tx_data[0]; +- transfer[0].len = QCASPI_CMD_LEN; +- transfer[1].tx_buf = &tx_data[1]; +- transfer[1].len = QCASPI_CMD_LEN; ++ /* Set up single 4-byte transfer */ ++ transfer.tx_buf = tx_buf; ++ transfer.len = 4; /* Single 4-byte transfer */ ++ spi_message_add_tail(&transfer, &msg); + +- spi_message_add_tail(&transfer[0], &msg); +- if (qca->legacy_mode) { +- spi_sync(qca->spi_dev, &msg); +- spi_message_init(&msg); +- } +- spi_message_add_tail(&transfer[1], &msg); +- ret = spi_sync(qca->spi_dev, &msg); ++ /* Perform the SPI transfer */ ++ ret = spi_sync(qca->spi_dev, &msg); + +- if (!ret) +- ret = msg.status; ++ if (!ret) ++ ret = msg.status; + +- if (ret) +- qcaspi_spi_error(qca); ++ if (ret) ++ qcaspi_spi_error(qca); + +- return ret; ++ return ret; + } + + int + qcaspi_write_register(struct qcaspi *qca, u16 reg, u16 value, int retry) + { +diff --git a/drivers/net/ethernet/qualcomm/qca_spi.c b/drivers/net/ethernet/qualcomm/qca_spi.c +index 926a087ae1c6..4db58951bb0e 100644 +--- a/drivers/net/ethernet/qualcomm/qca_spi.c ++++ b/drivers/net/ethernet/qualcomm/qca_spi.c +@@ -104,34 +104,48 @@ end_spi_intr_handling(struct qcaspi *qca, u16 intr_cause) + } + + static u32 + qcaspi_write_burst(struct qcaspi *qca, u8 *src, u32 len) + { +- __be16 cmd; +- struct spi_message msg; +- struct spi_transfer transfer[2]; +- int ret; +- +- memset(&transfer, 0, sizeof(transfer)); +- spi_message_init(&msg); +- +- cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); +- transfer[0].tx_buf = &cmd; +- transfer[0].len = QCASPI_CMD_LEN; +- transfer[1].tx_buf = src; +- transfer[1].len = len; +- +- spi_message_add_tail(&transfer[0], &msg); +- spi_message_add_tail(&transfer[1], &msg); +- ret = spi_sync(qca->spi_dev, &msg); +- +- if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { +- qcaspi_spi_error(qca); +- return 0; +- } +- +- return len; ++ u8 *tx_buf; /* Dynamically allocated transmit buffer */ ++ struct spi_message msg; ++ struct spi_transfer transfer; ++ int ret; ++ ++ /* Allocate buffer for command + data */ ++ tx_buf = kmalloc(QCASPI_CMD_LEN + len, GFP_KERNEL); ++ if (!tx_buf) { ++ qcaspi_spi_error(qca); ++ return 0; ++ } ++ ++ /* Initialize transfer and message */ ++ memset(&transfer, 0, sizeof(transfer)); ++ spi_message_init(&msg); ++ ++ /* Prepare buffer: first 2 bytes are the command, followed by data */ ++ __be16 cmd = cpu_to_be16(QCA7K_SPI_WRITE | QCA7K_SPI_EXTERNAL); ++ memcpy(tx_buf, &cmd, QCASPI_CMD_LEN); /* Copy 2-byte command */ ++ memcpy(tx_buf + QCASPI_CMD_LEN, src, len); /* Copy data */ ++ ++ /* Set up single transfer */ ++ transfer.tx_buf = tx_buf; ++ transfer.len = QCASPI_CMD_LEN + len; /* Total length: command + data */ ++ spi_message_add_tail(&transfer, &msg); ++ ++ /* Perform the SPI transfer */ ++ ret = spi_sync(qca->spi_dev, &msg); ++ ++ /* Free the allocated buffer */ ++ kfree(tx_buf); ++ ++ if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { ++ qcaspi_spi_error(qca); ++ return 0; ++ } ++ ++ return len; + } + + static u32 + qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len) + { +@@ -157,34 +171,65 @@ qcaspi_write_legacy(struct qcaspi *qca, u8 *src, u32 len) + } + + static u32 + qcaspi_read_burst(struct qcaspi *qca, u8 *dst, u32 len) + { +- struct spi_message msg; +- __be16 cmd; +- struct spi_transfer transfer[2]; +- int ret; +- +- memset(&transfer, 0, sizeof(transfer)); +- spi_message_init(&msg); +- +- cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); +- transfer[0].tx_buf = &cmd; +- transfer[0].len = QCASPI_CMD_LEN; +- transfer[1].rx_buf = dst; +- transfer[1].len = len; +- +- spi_message_add_tail(&transfer[0], &msg); +- spi_message_add_tail(&transfer[1], &msg); +- ret = spi_sync(qca->spi_dev, &msg); +- +- if (ret || (msg.actual_length != QCASPI_CMD_LEN + len)) { +- qcaspi_spi_error(qca); +- return 0; +- } +- +- return len; ++ u8 *tx_buf; /* Dynamically allocated transmit buffer */ ++ u8 *rx_buf; /* Dynamically allocated receive buffer */ ++ struct spi_message msg; ++ struct spi_transfer transfer; ++ int ret; ++ ++ /* Allocate transmit buffer for command + dummy data */ ++ tx_buf = kmalloc(QCASPI_CMD_LEN + len, GFP_KERNEL); ++ if (!tx_buf) { ++ qcaspi_spi_error(qca); ++ return 0; ++ } ++ ++ /* Allocate receive buffer for padding + data */ ++ rx_buf = kmalloc(QCASPI_CMD_LEN + len, GFP_KERNEL); ++ if (!rx_buf) { ++ kfree(tx_buf); ++ qcaspi_spi_error(qca); ++ return 0; ++ } ++ ++ /* Initialize transfer and message */ ++ memset(&transfer, 0, sizeof(transfer)); ++ spi_message_init(&msg); ++ ++ /* Prepare transmit buffer: first 2 bytes are the command, followed by dummy data */ ++ __be16 cmd = cpu_to_be16(QCA7K_SPI_READ | QCA7K_SPI_EXTERNAL); ++ memcpy(tx_buf, &cmd, QCASPI_CMD_LEN); /* Copy 2-byte command */ ++ memset(tx_buf + QCASPI_CMD_LEN, 0, len); /* Fill rest with zeros (dummy) */ ++ ++ /* Set up single transfer */ ++ transfer.tx_buf = tx_buf; ++ transfer.rx_buf = rx_buf; ++ transfer.len = QCASPI_CMD_LEN + len; /* Total length: command + data */ ++ spi_message_add_tail(&transfer, &msg); ++ ++ /* Perform the SPI transfer */ ++ ret = spi_sync(qca->spi_dev, &msg); ++ ++ /* Copy received data (skipping 2-byte padding) to dst */ ++ if (!ret && msg.actual_length == QCASPI_CMD_LEN + len) { ++ memcpy(dst, rx_buf + QCASPI_CMD_LEN, len); /* Copy only the data */ ++ } ++ ++ /* Free allocated buffers */ ++ kfree(tx_buf); ++ kfree(rx_buf); ++ ++ /* Check for errors */ ++ if (ret || msg.actual_length != QCASPI_CMD_LEN + len) { ++ qcaspi_spi_error(qca); ++ return 0; ++ } ++ ++ return len; + } + + static u32 + qcaspi_read_legacy(struct qcaspi *qca, u8 *dst, u32 len) + { +@@ -628,12 +673,14 @@ qcaspi_spi_thread(void *data) + + qcafrm_fsm_init_spi(&qca->frm_handle); + qca->stats.device_reset++; + + /* not synced. */ +- if (qca->sync != QCASPI_SYNC_READY) ++ if (qca->sync != QCASPI_SYNC_READY) { ++ netdev_dbg(qca->net_dev, "Out of sync"); + continue; ++ } + + netif_wake_queue(qca->net_dev); + netif_carrier_on(qca->net_dev); + } + +@@ -907,10 +954,11 @@ qca_spi_probe(struct spi_device *spi) + struct qcaspi *qca = NULL; + struct net_device *qcaspi_devs = NULL; + u8 legacy_mode = 0; + u16 signature; + int ret; ++ int i; + + if (!spi->dev.of_node) { + dev_err(&spi->dev, "Missing device tree\n"); + return -EINVAL; + } +@@ -950,11 +998,11 @@ qca_spi_probe(struct spi_device *spi) + wr_verify > QCASPI_WRITE_VERIFY_MAX) { + dev_err(&spi->dev, "Invalid write verify: %d\n", + wr_verify); + return -EINVAL; + } +- ++ + dev_info(&spi->dev, "ver=%s, clkspeed=%d, burst_len=%d, pluggable=%d\n", + QCASPI_DRV_VERSION, + qcaspi_clkspeed, + qcaspi_burst_len, + qcaspi_pluggable); +@@ -993,12 +1041,22 @@ qca_spi_probe(struct spi_device *spi) + } + + netif_carrier_off(qca->net_dev); + + if (!qcaspi_pluggable) { +- qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); +- qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); ++ for (i = 0; i < 5; i++) { ++ /* Discard first signature */ ++ qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); ++ qcaspi_read_register(qca, SPI_REG_SIGNATURE, &signature); ++ if (signature != QCASPI_GOOD_SIGNATURE) { ++ dev_info(&spi->dev, "Signature %d: 0x%04X Invalid, reset device", i, signature); ++ qcaspi_write_register(qca, SPI_REG_SPI_CONFIG, QCASPI_SLAVE_RESET_BIT, 0); ++ } else { ++ dev_info(&spi->dev, "Signature %d: 0x%04X OK", i, signature); ++ break; ++ } ++ } + + if (signature != QCASPI_GOOD_SIGNATURE) { + dev_err(&spi->dev, "Invalid signature (0x%04X)\n", + signature); + free_netdev(qcaspi_devs); +diff --git a/drivers/net/ethernet/qualcomm/qca_spi.h b/drivers/net/ethernet/qualcomm/qca_spi.h +index 58ad910068d4..0fb491e29ba7 100644 +--- a/drivers/net/ethernet/qualcomm/qca_spi.h ++++ b/drivers/net/ethernet/qualcomm/qca_spi.h +@@ -32,11 +32,11 @@ + #include + #include + + #include "qca_7k_common.h" + +-#define QCASPI_DRV_VERSION "0.2.7-i" ++#define QCASPI_DRV_VERSION "0.2.8" + #define QCASPI_DRV_NAME "qcaspi" + + #define QCASPI_GOOD_SIGNATURE 0xAA55 + + #define TX_RING_MAX_LEN 10 +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/kernel/rockchip64-vendor-6.1/rfkill-rk-sdio-rescan.patch b/patch/kernel/rockchip64-vendor-6.1/rfkill-rk-sdio-rescan.patch new file mode 100644 index 000000000000..e9bff071382a --- /dev/null +++ b/patch/kernel/rockchip64-vendor-6.1/rfkill-rk-sdio-rescan.patch @@ -0,0 +1,190 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: nikvoid +Date: Tue, 10 Jun 2025 20:56:18 +0300 +Subject: Force RFKILL to do SDIO rescan to detect WIFI chip properly +--- + drivers/mmc/core/host.c | 53 ++++++++++ + drivers/mmc/host/dw_mmc.c | 20 ++++ + include/linux/mmc/host.h | 2 + + net/rfkill/rfkill-wlan.c | 2 +- + 4 files changed, 76 insertions(+), 1 deletion(-) + +diff --git a/drivers/mmc/core/host.c b/drivers/mmc/core/host.c +index 21ae8634291f..f5ee2fbfafc2 100644 +--- a/drivers/mmc/core/host.c ++++ b/drivers/mmc/core/host.c +@@ -606,10 +606,12 @@ static int mmc_validate_host_caps(struct mmc_host *host) + } + + return 0; + } + ++struct mmc_host *primary_sdio_host; ++ + /** + * mmc_add_host - initialise host hardware + * @host: mmc host + * + * Register the host with the driver model. The host must be +@@ -633,10 +635,16 @@ int mmc_add_host(struct mmc_host *host) + #ifdef CONFIG_DEBUG_FS + mmc_add_host_debugfs(host); + #endif + + mmc_start_host(host); ++ ++ if (host->caps2 & MMC_CAP2_NO_SD && host->caps2 & MMC_CAP2_NO_MMC) { ++ pr_info("mmc_add_host: get sdio host!\n"); ++ primary_sdio_host = host; ++ } ++ + return 0; + } + + EXPORT_SYMBOL(mmc_add_host); + +@@ -675,5 +683,50 @@ void mmc_free_host(struct mmc_host *host) + mmc_pwrseq_free(host); + put_device(&host->class_dev); + } + + EXPORT_SYMBOL(mmc_free_host); ++ ++ ++/** ++ * mmc_host_rescan - triger software rescan flow ++ * @host: mmc host ++ * ++ * rescan slot attach in the assigned host. ++ * If @host is NULL, default rescan primary_sdio_host ++ * saved by mmc_add_host(). ++ * OR, rescan host from argument. ++ * ++ */ ++int mmc_host_rescan(struct mmc_host *host, int val, int is_cap_sdio_irq) ++{ ++ if (NULL != primary_sdio_host) { ++ if (!host) ++ host = primary_sdio_host; ++ else ++ pr_info("%s: mmc_host_rescan pass in host from argument!\n", ++ mmc_hostname(host)); ++ } else { ++ pr_err("sdio: host isn't initialization successfully.\n"); ++ return -ENOMEDIUM; ++ } ++ ++ pr_info("%s:mmc host rescan start!\n", mmc_hostname(host)); ++ ++ /* 0: oob 1:cap-sdio-irq */ ++ if (is_cap_sdio_irq == 1) { ++ host->caps |= MMC_CAP_SDIO_IRQ; ++ } else if (is_cap_sdio_irq == 0) { ++ host->caps &= ~MMC_CAP_SDIO_IRQ; ++ } else { ++ dev_err(&host->class_dev, "sdio: host doesn't identify oob or sdio_irq mode!\n"); ++ return -ENOMEDIUM; ++ } ++ ++ if (!(host->caps & MMC_CAP_NONREMOVABLE) && host->ops->set_sdio_status) ++ host->ops->set_sdio_status(host, val); ++ else ++ pr_info("%s: set_sdio_status is NULL!\n", mmc_hostname(host)); ++ ++ return 0; ++} ++EXPORT_SYMBOL(mmc_host_rescan); +diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c +index ab567987060e..1e04c332fcb1 100644 +--- a/drivers/mmc/host/dw_mmc.c ++++ b/drivers/mmc/host/dw_mmc.c +@@ -989,10 +989,29 @@ static void dw_mci_post_req(struct mmc_host *mmc, + data->sg_len, + mmc_get_dma_dir(data)); + data->host_cookie = COOKIE_UNMAPPED; + } + ++static int dw_mci_set_sdio_status(struct mmc_host *mmc, int val) ++{ ++ struct dw_mci_slot *slot = mmc_priv(mmc); ++ struct dw_mci *host = slot->host; ++ ++ spin_lock_bh(&host->lock); ++ ++ if (val) ++ set_bit(DW_MMC_CARD_PRESENT, &slot->flags); ++ else ++ clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); ++ ++ spin_unlock_bh(&host->lock); ++ ++ mmc_detect_change(slot->mmc, 20); ++ ++ return 0; ++} ++ + static int dw_mci_get_cd(struct mmc_host *mmc) + { + int present; + struct dw_mci_slot *slot = mmc_priv(mmc); + struct dw_mci *host = slot->host; +@@ -1881,10 +1900,11 @@ static const struct mmc_host_ops dw_mci_ops = { + .pre_req = dw_mci_pre_req, + .post_req = dw_mci_post_req, + .set_ios = dw_mci_set_ios, + .get_ro = dw_mci_get_ro, + .get_cd = dw_mci_get_cd, ++ .set_sdio_status = dw_mci_set_sdio_status, + .card_hw_reset = dw_mci_hw_reset, + .enable_sdio_irq = dw_mci_enable_sdio_irq, + .ack_sdio_irq = dw_mci_ack_sdio_irq, + .execute_tuning = dw_mci_execute_tuning, + .card_busy = dw_mci_card_busy, +diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h +index 8f918f9a1228..b9a2361f77dd 100644 +--- a/include/linux/mmc/host.h ++++ b/include/linux/mmc/host.h +@@ -207,10 +207,11 @@ struct mmc_host_ops { + * Optional callback to support controllers with HW issues for multiple + * I/O. Returns the number of supported blocks for the request. + */ + int (*multi_io_quirk)(struct mmc_card *card, + unsigned int direction, int blk_size); ++ int (*set_sdio_status)(struct mmc_host *host, int val); + + /* Initialize an SD express card, mandatory for MMC_CAP2_SD_EXP. */ + int (*init_sd_express)(struct mmc_host *host, struct mmc_ios *ios); + }; + +@@ -529,10 +530,11 @@ struct device_node; + + struct mmc_host *mmc_alloc_host(int extra, struct device *); + int mmc_add_host(struct mmc_host *); + void mmc_remove_host(struct mmc_host *); + void mmc_free_host(struct mmc_host *); ++int mmc_host_rescan(struct mmc_host *host, int val, int is_cap_sdio_irq); + void mmc_of_parse_clk_phase(struct mmc_host *host, + struct mmc_clk_phase_map *map); + int mmc_of_parse(struct mmc_host *host); + int mmc_of_parse_voltage(struct mmc_host *host, u32 *mask); + +diff --git a/net/rfkill/rfkill-wlan.c b/net/rfkill/rfkill-wlan.c +index 6e0f162712e1..e9c8b0ea4940 100644 +--- a/net/rfkill/rfkill-wlan.c ++++ b/net/rfkill/rfkill-wlan.c +@@ -345,11 +345,11 @@ EXPORT_SYMBOL(rockchip_wifi_power); + * Wifi Sdio Detect Func + * + *************************************************************************/ + int rockchip_wifi_set_carddetect(int val) + { +- return 0; ++ return mmc_host_rescan(NULL, val, 1); + } + EXPORT_SYMBOL(rockchip_wifi_set_carddetect); + + /************************************************************************** + * +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/kernel/rockchip64-vendor-6.1/usbotg-fix.patch b/patch/kernel/rockchip64-vendor-6.1/usbotg-fix.patch new file mode 100644 index 000000000000..a965513c8122 --- /dev/null +++ b/patch/kernel/rockchip64-vendor-6.1/usbotg-fix.patch @@ -0,0 +1,28 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: nikvoid +Date: Sat, 14 Jun 2025 23:44:41 +0300 +Subject: Apply workaround for DWC2 USBOTG found here: https://bugzilla.kernel.org/show_bug.cgi?id=209555 +--- + drivers/usb/dwc2/params.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/usb/dwc2/params.c b/drivers/usb/dwc2/params.c +index 659b7dff164a..eae80802f693 100644 +--- a/drivers/usb/dwc2/params.c ++++ b/drivers/usb/dwc2/params.c +@@ -382,11 +382,11 @@ static void dwc2_set_param_power_down(struct dwc2_hsotg *hsotg) + else if (hsotg->hw_params.power_optimized) + val = DWC2_POWER_DOWN_PARAM_PARTIAL; + else + val = DWC2_POWER_DOWN_PARAM_NONE; + +- hsotg->params.power_down = val; ++ hsotg->params.power_down = 0; + } + + static void dwc2_set_param_lpm(struct dwc2_hsotg *hsotg) + { + struct dwc2_core_params *p = &hsotg->params; +-- +Created with Armbian build tools https://github.com/armbian/build + diff --git a/patch/u-boot/v2025.04/board_luckfox-nova-w/add-board-luckfox-nova-w-rk3308b.patch b/patch/u-boot/v2025.04/board_luckfox-nova-w/add-board-luckfox-nova-w-rk3308b.patch new file mode 100644 index 000000000000..ca94da712cee --- /dev/null +++ b/patch/u-boot/v2025.04/board_luckfox-nova-w/add-board-luckfox-nova-w-rk3308b.patch @@ -0,0 +1,339 @@ +diff --git a/arch/arm/dts/rk3308-luckfox-nova-w-u-boot.dtsi b/arch/arm/dts/rk3308-luckfox-nova-w-u-boot.dtsi +new file mode 100644 +index 00000000000..c515003d25b +--- /dev/null ++++ b/arch/arm/dts/rk3308-luckfox-nova-w-u-boot.dtsi +@@ -0,0 +1,17 @@ ++// SPDX-License-Identifier: GPL-2.0+ ++/* ++ * (C) Copyright 2018-2019 Rockchip Electronics Co., Ltd ++ */ ++#include "rk3308-u-boot.dtsi" ++ ++/ { ++ chosen { ++ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &emmc; ++ }; ++}; ++ ++&uart4 { ++ u-boot,dm-pre-reloc; ++ clock-frequency = <24000000>; ++ status = "okay"; ++}; +diff --git a/dts/upstream/src/arm64/rockchip/rk3308-luckfox-nova-w.dts b/dts/upstream/src/arm64/rockchip/rk3308-luckfox-nova-w.dts +new file mode 100644 +index 00000000000..3b6e3f52bca +--- /dev/null ++++ b/dts/upstream/src/arm64/rockchip/rk3308-luckfox-nova-w.dts +@@ -0,0 +1,231 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd ++ */ ++ ++/dts-v1/; ++#include ++#include "rk3308.dtsi" ++ ++/ { ++ model = "Luckfox Nova W RK3308B"; ++ compatible = "rockchip,rk3308b-evb-v10", "rockchip,rk3308"; ++ ++ chosen { ++ stdout-path = "serial4:1500000n8"; ++ }; ++ ++ vdd_core: vdd-core { ++ compatible = "pwm-regulator"; ++ pwms = <&pwm0 0 5000 1>; ++ regulator-name = "vdd_core"; ++ regulator-min-microvolt = <827000>; ++ regulator-max-microvolt = <1340000>; ++ regulator-init-microvolt = <1015000>; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-settling-time-up-us = <250>; ++ status = "okay"; ++ }; ++ ++ vdd_log: vdd-log { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_log"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1050000>; ++ regulator-max-microvolt = <1050000>; ++ }; ++ ++ vdd_1v0: vdd-1v0 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vdd_1v0"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1000000>; ++ regulator-max-microvolt = <1000000>; ++ }; ++ ++ vcc_3v3_codec: vcc_io: vcc-io { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_io"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vccio_sdio: vcc_1v8: vcc-1v8 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v8"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_io>; ++ }; ++ ++ vcc_1v8_codec: vcc-1v8-codec { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_1v8_codec"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vcc_io>; ++ }; ++ ++ vcc_ddr: vcc-ddr { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_ddr"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ }; ++ ++ vccio_flash: vccio-flash { ++ compatible = "regulator-fixed"; ++ regulator-name = "vccio_flash"; ++ regulator-always-on; ++ regulator-boot-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++ ++ vcc_phy: vcc-phy-regulator { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc_phy"; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ ++ vbus_host: vbus-host-regulator { ++ compatible = "regulator-fixed"; ++ enable-active-high; ++ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&usb_drv>; ++ regulator-name = "vbus_host"; ++ }; ++ ++ vccio_sd: vccio-sd { ++ compatible = "regulator-gpio"; ++ regulator-name = "vccio_sd"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ states = <1800000 0x0 3300000 0x1>; ++ }; ++ ++ vcc_sd: vcc-sd { ++ compatible = "regulator-fixed"; ++ gpio = <&gpio4 RK_PD6 GPIO_ACTIVE_LOW>; ++ regulator-name = "vcc_sd"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <&vdd_core>; ++}; ++ ++&cpu0_opp_table { ++ opp-1200000000 { ++ status = "okay"; ++ }; ++ opp-1296000000 { ++ status = "okay"; ++ }; ++}; ++ ++&emmc { ++ bus-width = <8>; ++ cap-mmc-highspeed; ++ mmc-hs200-1_8v; ++ /* no-sdio; */ ++ /* no-sd; */ ++ /* disable-wp; */ ++ non-removable; ++ /* num-slots = <1>; */ ++ /* supports-emmc; */ ++ status = "okay"; ++}; ++ ++&io_domains { ++ status = "okay"; ++ ++ vccio0-supply = <&vcc_io>; ++ vccio1-supply = <&vcc_io>; ++ vccio2-supply = <&vcc_io>; ++ vccio3-supply = <&vccio_flash>; ++ vccio4-supply = <&vccio_sdio>; ++ vccio5-supply = <&vcc_io>; ++}; ++ ++ ++&pinctrl { ++ usb { ++ usb_drv: usb-drv { ++ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; ++ }; ++ }; ++}; ++ ++&pwm0 { ++ status = "okay"; ++ pinctrl-names = "active"; ++ pinctrl-0 = <&pwm0_pin_pull_down>; ++}; ++ ++&saradc { ++ status = "okay"; ++ vref-supply = <&vcc_1v8>; ++}; ++ ++&sdmmc { ++ max-frequeency = <150000000>; ++ supports-sd; ++ bus-width = <4>; ++ cap-mmc-highspeed; ++ cap-sd-highspeed; ++ disable-wp; ++ cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>; ++ num-slots = <1>; ++ vmmc-supply = <&vcc_sd>; ++ vqmmc-supply = <&vccio_sd>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_det &sdmmc_bus4>; ++ ard-detect-delay = <800>; ++ status = "okay"; ++}; ++ ++&uart4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart4_xfer>; ++ status = "okay"; ++}; ++ ++ &u2phy { ++ status = "okay"; ++ }; ++ ++ &u2phy_otg { ++ status = "okay"; ++ }; ++ ++ &u2phy_host { ++ status = "okay"; ++ }; ++ ++ &usb_host_ehci { ++ status = "okay"; ++ }; ++ ++ &usb_host_ohci { ++ status = "okay"; ++ }; ++ ++ &usb20_otg { ++ status = "okay"; ++ }; +diff --git a/configs/luckfox-nova-w_rk3308b_defconfig b/configs/luckfox-nova-w_rk3308b_defconfig +new file mode 100644 +index 00000000000..781c19251f4 +--- /dev/null ++++ b/configs/luckfox-nova-w_rk3308b_defconfig +@@ -0,0 +1,72 @@ ++CONFIG_ARM=y ++CONFIG_SKIP_LOWLEVEL_INIT=y ++CONFIG_COUNTER_FREQUENCY=24000000 ++CONFIG_ARCH_ROCKCHIP=y ++CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3308-luckfox-nova-w" ++CONFIG_DM_RESET=y ++CONFIG_ROCKCHIP_RK3308=y ++CONFIG_TARGET_EVB_RK3308=y ++CONFIG_DEBUG_UART_BASE=0xFF0E0000 ++CONFIG_DEBUG_UART_CLOCK=24000000 ++# CONFIG_DEBUG_UART_BOARD_INIT is not set ++CONFIG_SYS_LOAD_ADDR=0x800800 ++CONFIG_DEBUG_UART=y ++CONFIG_ANDROID_BOOT_IMAGE=y ++CONFIG_FIT=y ++CONFIG_FIT_VERBOSE=y ++CONFIG_DEFAULT_FDT_FILE="rockchip/rk3308-luckfox-nova-w.dtb" ++# CONFIG_DISPLAY_CPUINFO is not set ++CONFIG_SPL_MAX_SIZE=0x40000 ++CONFIG_SPL_PAD_TO=0x7f8000 ++# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set ++CONFIG_CMD_GPIO=y ++CONFIG_CMD_GPT=y ++CONFIG_CMD_MMC=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_ROCKUSB=y ++CONFIG_CMD_USB_MASS_STORAGE=y ++CONFIG_CMD_RNG=y ++CONFIG_CMD_KASLRSEED=y ++CONFIG_CMD_REGULATOR=y ++CONFIG_SPL_OF_CONTROL=y ++CONFIG_OF_LIVE=y ++CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_REGMAP=y ++CONFIG_SYSCON=y ++CONFIG_CLK=y ++# CONFIG_USB_FUNCTION_FASTBOOT is not set ++CONFIG_ROCKCHIP_GPIO=y ++CONFIG_SYS_I2C_ROCKCHIP=y ++CONFIG_LED=y ++CONFIG_LED_GPIO=y ++CONFIG_ROCKCHIP_IODOMAIN=y ++CONFIG_SUPPORT_EMMC_RPMB=y ++CONFIG_MMC_DW=y ++CONFIG_MMC_DW_ROCKCHIP=y ++CONFIG_PHY_REALTEK=y ++CONFIG_DM_MDIO=y ++CONFIG_DM_ETH_PHY=y ++CONFIG_ETH_DESIGNWARE=y ++CONFIG_GMAC_ROCKCHIP=y ++CONFIG_PHY_ROCKCHIP_INNO_USB2=y ++CONFIG_PINCTRL=y ++CONFIG_REGULATOR_PWM=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_PWM_ROCKCHIP=y ++CONFIG_RAM=y ++CONFIG_BAUDRATE=1500000 ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYS_NS16550_MEM32=y ++CONFIG_SYSINFO=y ++CONFIG_SYSRESET=y ++CONFIG_USB=y ++CONFIG_DM_USB_GADGET=y ++CONFIG_USB_EHCI_HCD=y ++CONFIG_USB_EHCI_GENERIC=y ++CONFIG_USB_GADGET=y ++CONFIG_USB_GADGET_DWC2_OTG=y ++CONFIG_USB_GADGET_DOWNLOAD=y ++CONFIG_USB_FUNCTION_ROCKUSB=y ++CONFIG_LZO=y ++CONFIG_ERRNO_STR=y +