docs(dn): Ibrahim Hashim 10/28/2025 (#421)

* Add irh8156.md (clean branch for PR)

* docs(dn): Ibrahim 10/28/2025

---------

Co-authored-by: Ibrahim <[email protected]>
Co-authored-by: Noahms12 <[email protected]>

Author: 3 people

src/design_notebooks/2025fall/irh8156.md

@@ -34,4 +34,23 @@ Project Work:
   * [Register File Implementation]: Wrote and tested a register file module for the RiSC-16 CPU: ([Register Implementation](https://github.com/ihash123/processorDesign))
 
 Comments:
-  * Worked with my team to create and test a register file for the RiSC-16 CPU, and tested it with the given testbench.
+  * Worked with my team to create and test a register file for the RiSC-16 CPU, and tested it with the given testbench.
+
+
+## Week of 13 October 2025
+
+Project Work:
+  * [Data Memory Testbench Implementation]: Wrote and tested a testbench for the provided module: ([https://github.com/1fHu/ProcessorDesign])
+
+Comments:
+  * Worked with my team to create and test a testbench for the module provided, and tested it.
+
+
+## Week of 20 October 2025
+
+Project Work:
+  * [Instruction Memory & Control Module Implementation]: Wrote and tested the instruction memory and control model for the RiSC-16 CPU: ([https://github.com/1fHu/ProcessorDesign])
+  
+Comments:
+  * Worked with my team to create and test the Instruction Memory and Control module, and tested them.
+  * Worked with my team to create and test a register file for the RiSC-16 CPU, and tested it with the given testbench.