feat: cocotb test for example 2

Author: pineylilly

.github/workflows/cocotb_unit_test.yaml

@@ -21,8 +21,16 @@ jobs:
       - name: Install cocotb
         run: pip install cocotb
 
-      - name: Run cocotb test
+      - name: Run cocotb unit test [ex01_and_gate]
         run: |
           cd ex01_and_gate/test
           make
           ! grep failure results.xml
+          cd ../..
+      
+      - name: Run cocotb unit test [ex02_1_bit_full_adder]
+        run: |
+          cd ex02_1_bit_full_adder/test
+          make
+          ! grep failure results.xml
+          cd ../..

ex02_1_bit_full_adder/test/Makefile

@@ -0,0 +1,17 @@
+# Simulator
+SIM ?= icarus
+
+# Top level language
+TOPLEVEL_LANG ?= verilog
+
+# Files
+VERILOG_SOURCES = $(shell pwd)/../full_adder.v
+
+# TOPLEVEL is the name of the toplevel module in your Verilog or VHDL file
+TOPLEVEL = full_adder
+
+# MODULE is the basename of the Python test file
+MODULE = full_adder_test
+
+# include cocotb's make rules to take care of the simulator setup
+include $(shell cocotb-config --makefiles)/Makefile.sim

ex02_1_bit_full_adder/test/full_adder_test.py

@@ -0,0 +1,18 @@
+import cocotb
+from cocotb.triggers import Timer
+
+@cocotb.test()
+async def full_adder_test(dut):
+    a = (0, 0, 1, 1, 0, 0, 1, 1)
+    b = (0, 1, 0, 1, 0, 1, 0, 1)
+    cin = (0, 0, 0, 0, 1, 1, 1, 1)
+    
+    s = (0, 1, 1, 0, 1, 0, 0, 1)
+    cout = (0, 0, 0, 1, 0, 1, 1, 1)
+    
+    for i in range(8):
+        dut.a.value = a[i]
+        dut.b.value = b[i]
+        dut.cin.value = cin[i]
+        await Timer(1, units='ns')
+        assert dut.s.value == s[i] and dut.cout.value == cout[i], f"[Iteration {i}] output is (s,cout) = ({dut.s.value},{dut.cout.value}), expected ({s[i]},{cout[i]})"